Can a GPIO pin be configured as an output on the network core but also be used as the source pin to generate a GPIOTE event on the application core?

We have a situation where the network core of the nRF5340 has been given control of Port 0/GPIO pin X (GPIO0->PIN_CFG[X].MCUSEL = 1 on the application core). The network core software has configured Port 0/GPIO pin X as an output and is actively driving it low and high according to appropriate logic. The software on the application core would like to be able to drive Port 0/GPIO pin Y (which it has control over, GPIO0->PIN_CFG[Y].MCUSEL = 0) to the same value as GPIO pin X, but the application core software is not privy to the timing of Port 0/GPIO pin X levels (being controlled by the network core).

Is it possible on the application core to configure GPIOTE channel Z as follows:

- GPIOTE0->CONFIG[Z].MODE = 1   (event)

- GPIOTE0->PSEL = X                        (Pin X)

- GPIOTE0->PORT = 0                        (Port 0)

- GPIOTE0->POLARITY = 1                (LoToHi)

And then publish the IN[Z] event to DPPI channel A:

- GPIOTE0->PUBLISH_IN[Z].CHIDX = A   (DPPI channel A)

- GPIOTE0->PUBLISH_IN[Z].EN = 1         (enable)

If the above configurations will indeed result in IN[Z] being generated, then DPPI channel A can be used to trigger the SET[] task of another GPIOTE  channel configured in task mode for Port 0/GPIO Pin Y.

The crux of the question is will the GPIOTE channel on the application core be able to treat Port 0/GPIO X like an input for purposes of generating an IN[] event while the network core has control of the pin and has it configured as an output?

Related