nRF52840: USB D+ / D- impedance matching

Hi

1: According to this ticket: https://devzone.nordicsemi.com/f/nordic-q-a/28335/nrf52840-usb-pins-impedance you recommend to not

have any serial resistors on the D+ / D- lines. Other ref designs has 39Ohms serial resistors.

2: According to the USB standard the differential impedance on the D+ / D- lines should be 90 Ohms.

 On the 'nRF52840 USB Dongle ref design' the D+ / D- lines are routed without any GND plane below

Some questions:

What is the impedence on the D+ / D- routing on your ref designs?

What is your recommendations for PCB routing of the D+ / D- lines ?

Do you have any measurements showing best practice?

Since the data rate is 'only' 12MBit, is signal integrity still critical to make USB work properly?

How is the D+ / D- signals sampled inside the nRF52840 (the datasheet states a local USB clock of 48MHz =  4 x 'oversampling')?

Parents
  • The series resistors are built into the USB-PHY already. The device is designed to be used without external resistors. 

    The speed of the USB interface isn't really a problem for the routing unless the tracks are very long. Keeping them as a matched pair is ok. For long  tracks, stick to the USB recommended 90 ohm differential impedance. 

    The USB isn't oversampled pr se. A faster 48 MHz clock is needed for enough time to synchronize the clock to the data stream.

  • Thanks. Som more questions:

    What is the value of the series resistors in the bulit-in Phy?

    What would happen if there are external resistors in addition to the built-in resistors?

    Could you explain more on how the internal circuitry synchronizes to the USB data stream (If the data is 'sampled' in the middle of the 'bit periode' it should be safe)?

    My concern is high over- / undershoot on incoming signals that may false-trigger the system causing bit errors.

Reply
  • Thanks. Som more questions:

    What is the value of the series resistors in the bulit-in Phy?

    What would happen if there are external resistors in addition to the built-in resistors?

    Could you explain more on how the internal circuitry synchronizes to the USB data stream (If the data is 'sampled' in the middle of the 'bit periode' it should be safe)?

    My concern is high over- / undershoot on incoming signals that may false-trigger the system causing bit errors.

Children
  • Rulu said:
    What is the value of the series resistors in the bulit-in Phy?

    The total impedance will be according to the USB spec

    Rulu said:
    What would happen if there are external resistors in addition to the built-in resistors?

    You will most probably have problems with the signalling

    Rulu said:
    Could you explain more on how the internal circuitry synchronizes to the USB data stream (If the data is 'sampled' in the middle of the 'bit periode' it should be safe)?

    Sorry, the USB-PHY is considered a black box

    Rulu said:
    My concern is high over- / undershoot on incoming signals that may false-trigger the system causing bit errors.

    The best will be to hock it up to a USB tester and do an eye pattern test, like this: http://www.testusb.com/HSEYE.htm

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