case about GPIO equivalent circuit diagram when no power supply

[peter.min]

Hi,

1. When nRF5340 has no power supply, adding 3.3V power supply to the digital IO port will produce voltage drop.

2. Why does the voltage drop occur?

3. What is the equivalent status of the IO port? Is it in a high resistance state?

4. Can you provide the equivalent circuit diagram of this state?

Thank you for all your assistance.
Kind regards,
Peter.Min

[Vidar Berg]

Hi,

You exceed the Absolute maximum ratings for the IC if you apply more than VDD+0.3 V on the IO pin, and this may cause permanent damage to the chip.

When you apply 3.3 volts on the GPIO pin while VDD=0V you will basically end up back powering the chip via the pin, hence the voltage drop.

Best regards,

Vidar

[peter.min]

Hi Vidar Berg,

In actual measurement, power supply behavior through IO port did occur, and there is about 0.6V voltage drop.

Is it equivalent to the following circuit?

Thank you very much.
Kind regards,
Peter.Min

[Vidar Berg]

Hi Peter.Min,

I'm not familiar with the internal design of the pad, but it seems like the circuit you drew with the diodes is typically how ESD protection is implemented in IC designs. But like I said, It's not safe to apply voltage on the pad when VDD is 0V.

Kind regards,

Vidar