DMA behavior when using multiple DMA channels simultaneously

[Rob Garner]

The product we are developing will be using a proprietary radio protocol. While in receive or send mode, the radio will either read the Tx data from a buffer via Easy DMA, or it will write the Rx data to a buffer via Easy DMA. During the Tx and Rx periods, we will also need to write and receive data via the SPI interface (up to 10MHz bit rate). Specifically, when the nRF52805 is the SPI Master, we will need to be able to send (dummy) data to the slave, and at the same time read back relevant data from the slave (duplex operation).

Does Nordic see an issue when we have, in effect, three DMA channels running at the same time (all using different source/destination buffers). Could there be priority conflicts, or collisions resulting in data loss? Does Nordic have any recommendations?

Thanks

Rob

[Håkon Alseth]

Hi,

 

Does Nordic see an issue when we have, in effect, three DMA channels running at the same time (all using different source/destination buffers). Could there be priority conflicts, or collisions resulting in data loss? Does Nordic have any recommendations?

That should not be problematic, DMA wise atleast, as long as you place each dma-buffer in different RAM blocks (ie. absolute placement for instance).

The effects of having more than one DMA buffer in the same AHB slave RAM block is described here:

https://infocenter.nordicsemi.com/topic/ps_nrf52805/ahbmultilayer.html?cp=4_6_0_3_6

 

The memory block overview can be found here:

https://infocenter.nordicsemi.com/topic/ps_nrf52805/memory.html?cp=4_6_0_3_1

 

Kind regards,

Håkon

[Rob Garner]

Hi Hakon

Thank you for the information, it's very helpful.

If you like you can close the case.

Cheers

Rob

[Håkon Alseth]

Hi Rob,

 

Glad to hear!

Hope you have a wonderful day!

 

Cheers,

Håkon