The Event Generator Unit peripheral is new in nrf52. There is a basic description in the current manual of nrf52, but not much can be inferred as to how to use it. Could an example be provided for a typical use case. Thanks!
The Event Generator Unit peripheral is new in nrf52. There is a basic description in the current manual of nrf52, but not much can be inferred as to how to use it. Could an example be provided for a typical use case. Thanks!
Don't really see the problem here - the manual is clear - it's short because the thing is so incredibly simple. It works like any and every other TASK/EVENT on any other peripheral on the chip, trigger the task to generate the event, read/poll the event, enable or disable the interrupt for each one of the 16 events in each instance of the EGU, write an interrupt handler for that EGU and handle the set interrupts.
It is not clear in the EGU section of the docs how to trigger a task. Reading under Peripherals>Task: you trigger a task by writing a 1 to the register. The task registers in the EGU are instances of the Task class of registers, where the "task" that is triggered in the EGU peripheral is simply the setting of an event (and not the execution of some more advanced function in the peripheral.)
It is not clear to me whether you would ever read a task register. You might need to read an event register, unless you know each event is one-to-one with an interrupt vector and ISR. It is also not clear to me whether you can write an event register: it seems that only peripherals can set an event register. (That may be a source of confusion: why does the EGU need both TASK and EVENT registers, why could not the design be just one readable/writeable register?)
You can trigger any task in firmware (your software) or the PPI can be configured to trigger a task without software intervention.
You trigger an SWI interrupt in firmware by pending an interrupt in the NVIC.
The SWI and EGU interrupts are through shared vectors. So the ISR for such a vector might need to examine (dispatch on) many event registers to determine whether and which event was triggered by an EGU , or examine the interrupt flags to determine whether the ISR execution is due to SWI triggered by firmware. Again, depending on whether you have set up events one-to-one with ISRs.
It is not clear in the EGU section of the docs how to trigger a task. Reading under Peripherals>Task: you trigger a task by writing a 1 to the register. The task registers in the EGU are instances of the Task class of registers, where the "task" that is triggered in the EGU peripheral is simply the setting of an event (and not the execution of some more advanced function in the peripheral.)
It is not clear to me whether you would ever read a task register. You might need to read an event register, unless you know each event is one-to-one with an interrupt vector and ISR. It is also not clear to me whether you can write an event register: it seems that only peripherals can set an event register. (That may be a source of confusion: why does the EGU need both TASK and EVENT registers, why could not the design be just one readable/writeable register?)
You can trigger any task in firmware (your software) or the PPI can be configured to trigger a task without software intervention.
You trigger an SWI interrupt in firmware by pending an interrupt in the NVIC.
The SWI and EGU interrupts are through shared vectors. So the ISR for such a vector might need to examine (dispatch on) many event registers to determine whether and which event was triggered by an EGU , or examine the interrupt flags to determine whether the ISR execution is due to SWI triggered by firmware. Again, depending on whether you have set up events one-to-one with ISRs.