NRF24L01 OBSERVE_TX Issue

[JVMelo]

Hello,

We have a PIC32 controlling the NRF24L01 with some sucess so far.

But sometimes we get the chip in a state that we can't get off.

We still cannot pinpoint the issue, all RX_TX adresses are ok, the same for the channels, but at some point we get the OBSERVE_TX with a value of OxOD.

Below are most of the configs of the NRFL2401.

NRF24 Details Sender
ST: 0x0e
AW: 0x03
RT: 0xff
CH: 0x6a
RF: 0x27
OBTx: 0x0d
RX_ADDR_P0: 0x5f:0x1b:0x5c:0xf5:0xb1
RX_ADDR_P1: 0x01:0x01:0x28:0x1f:0x00
TX_ADDR: 0x5f:0x1b:0x5c:0xf5:0xb1
P2: 0x01
P3: 0x02
P4: 0x03
P5: 0x04

NRF24 Details Receiver
ST: 0x0e
AW: 0x03
RT: 0xff
CH: 0x6a
RF: 0x27
OBTx: 0x00
RX_ADDR_P0: 0x5f:0x1b:0x5c:0xf5:0xb1
RX_ADDR_P1: 0x01:0x01:0x28:0x1f:0x00
TX_ADDR: 0x5f:0x1b:0x5c:0xf5:0xb1
P2: 0x01
P3: 0x02
P4: 0x03
P5: 0x04

In the datasheet it says that to clear the Observe_TX a RF_CH must be set. 

Everytime we do a communication we set the RF_CH register (sender), but Observe_TX still remains 0x0D, even right after a RF_CH register set.

I know there's some info missing here, but if anyone has any idea why this might be happening I would apreciate the feedback.

Thanks in advance,

Happy holidays to you all.

Regards,

[Håkon Alseth]

Hi,

 

We have a PIC32 controlling the NRF24L01 with some sucess so far.

But sometimes we get the chip in a state that we can't get off.

If you get a corrupt payload, where the length field is 0 or greater than 32, and still read out that payload, the state machine inside nRF24L01+ will go into a bad state.

It is therefore very important that each time you receive a payload, that you read the length via command "R_RX_PL_WID" and flush the FIFO if the length is 0 or > 32 bytes.

but at some point we get the OBSERVE_TX with a value of OxOD.

In a working scenario, you see his change as intended?

 

Does a reset of the PTX device bring the communication back?

 

Kind regards,

Håkon