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Fastest SPIM instance pin and Trace pin configuration

rolandash

Hi,

This question is about 5340. I would like to use SPIM4 instance at fastest 32M speed. According to datasheet this instance needs to use dedicated pin assignments, and these pins happen to be trace pins as well. So I would like to clarify some ambiguities:

1. as in following screenshot, P0.11 is the "dedicated CSN" pin for SPIM4. while MISO/MOSI/SCK pin looks reasonable to ask for high drive, is CS pin really need that high drive config? Can I use other pin as CSN for SPIM4?

Also, in case I would like to attach more than one spi devices on this bus, it seems using other pin as CSN is inevitable, can I do that safely?

2. I do not need DCX function in my SPI connection. Can I use this pin for other purpose?

3. As P0.11 and P0.12 is multiplexed with Traceclk and traced0(SWO), I am not very sure about the default behavior of these 2 pins. If I attach debugger to these 2 pins, will they automatically turn into trace function, or I still need to reconfigure them somewhere? And these pin will just back to SPI function as soon as I remove the debugger?

Thank you!

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  • 0

    Hi

    I expect it would be OK to use another GPIO for CSN, but we haven't done timing analysis for this case on our side. As for all high-speed interface signals, our recommendation is to keep CSN where it is as well to keep PCB traces as short as possible. 

    If you try with another pin as the CSN pin and find that the CSN timing with respect to SCK or data is too tight for 32MHz with the new GPIO, you can try setting CSNDUR (IFTIMING.CSNDUR register) to a value of e.g. 2-4, as this will increase the distance between CSN transitions and the first/last SCK/data toggle.

    Best regards,

    Simon

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  • 0

    Hi

    I expect it would be OK to use another GPIO for CSN, but we haven't done timing analysis for this case on our side. As for all high-speed interface signals, our recommendation is to keep CSN where it is as well to keep PCB traces as short as possible. 

    If you try with another pin as the CSN pin and find that the CSN timing with respect to SCK or data is too tight for 32MHz with the new GPIO, you can try setting CSNDUR (IFTIMING.CSNDUR register) to a value of e.g. 2-4, as this will increase the distance between CSN transitions and the first/last SCK/data toggle.

    Best regards,

    Simon

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