I'm using Ant sdh,I want to make system enter sleep,how to disable nrf_sdh_ant?
I usd this function to enable sdh,but can't disable sdh to enter sleep,how to use?
static void softdevice_setup(void)
{
ret_code_t err_code = nrf_sdh_enable_request();
APP_ERROR_CHECK(err_code);
ASSERT(nrf_sdh_is_enabled());
err_code = nrf_sdh_ant_enable();
APP_ERROR_CHECK(err_code);
}
Hi,
There is no need to disable SDH in order to enter sleep. Normally, the SoftDevice and the SoftDevice handler library are enabled at startup, and never disabled. Are you sure you need to / want to disable the SoftDevice and SDH? If so, why? If you really do, then you have the nrf_sdh_disable_request().
when call the function "nrf_nvmc_page_erase",the system will jump to "NRF_BREAKPOINT_COND;" then died
and error code id is 1
Hi,
You cannot call nrf_nvmc_page_erase() when using a SoftDevice. In that case, you should use sd_flash_page_erase() instead, which does the exact same thing.
Hi,
You cannot call nrf_nvmc_page_erase() when using a SoftDevice. In that case, you should use sd_flash_page_erase() instead, which does the exact same thing.
ret_code_t err_code=sd_flash_page_erase(page_address/0x1000);
APP_ERROR_CHECK(err_code);
ret_code_t err_code = sd_flash_write(&address,&value,1);
APP_ERROR_CHECK(err_code);
when write flash,err_code return 0x10,how to fix it?page_address=0x77800
Hi,
Is it so that sd_flash_page_erase() succeeds and sd_flash_write() fails?
The error code 0x10 is NRF_ERROR_INVALID_ADDR. According to the API documentation for sd_flash_write() you will get this when "Tried to write to a non existing flash address, or p_dst or p_src was unaligned".
What is the value of address, is that also 0x77800? If yes, that is no problem, as this is word aligned. But what about the source address?
sd_flash_write() fails，what is the source address?
Please see the API documentation for sd_flash_write():
/**@brief Flash Write * * Commands to write a buffer to flash * * If the SoftDevice is enabled: * This call initiates the flash access command, and its completion will be communicated to the * application with exactly one of the following events: * - @ref NRF_EVT_FLASH_OPERATION_SUCCESS - The command was successfully completed. * - @ref NRF_EVT_FLASH_OPERATION_ERROR - The command could not be started. * * If the SoftDevice is not enabled no event will be generated, and this call will return @ref NRF_SUCCESS when the * write has been completed * * @note * - This call takes control over the radio and the CPU during flash erase and write to make sure that * they will not interfere with the flash access. This means that all interrupts will be blocked * for a predictable time (depending on the NVMC specification in the device's Product Specification * and the command parameters). * - The data in the p_src buffer should not be modified before the @ref NRF_EVT_FLASH_OPERATION_SUCCESS * or the @ref NRF_EVT_FLASH_OPERATION_ERROR have been received if the SoftDevice is enabled. * - This call will make the SoftDevice trigger a hardfault when the page is written, if it is * protected. * * * @param[in] p_dst Pointer to start of flash location to be written. * @param[in] p_src Pointer to buffer with data to be written. * @param[in] size Number of 32-bit words to write. Maximum size is the number of words in one * flash page. See the device's Product Specification for details. * * @retval ::NRF_ERROR_INVALID_ADDR Tried to write to a non existing flash address, or p_dst or p_src was unaligned. * @retval ::NRF_ERROR_BUSY The previous command has not yet completed. * @retval ::NRF_ERROR_INVALID_LENGTH Size was 0, or higher than the maximum allowed size. * @retval ::NRF_ERROR_FORBIDDEN Tried to write to an address outside the application flash area. * @retval ::NRF_SUCCESS The command was accepted. */ SVCALL(SD_FLASH_WRITE, uint32_t, sd_flash_write(uint32_t * p_dst, uint32_t const * p_src, uint32_t size));
As you see, the second parameter (p_src) is the source address (pointer to the data you are reading from). The first parameter is the destination address (location in flash where the data is to be written). Both these addresses needs to be word aligned, meaning they must be divisible by 4. And of corse they must be valid addresses, meaning within the memory regions of the device.
