Hello !
1. In some legacy code I have found that radio channel is configured twice
Eugene
Hello !
1. In some legacy code I have found that radio channel is configured twice
Eugene
Hi,
1. What legacy code are you referring to? For BLE, the specification states that the data whitening should be set to the BLE channel. If you are using a proprietary protocol, you can set the whitening as you please, as long as it is set to the same on both ends of the radio link.
2. How is your radio configuration? Have you set the PCNF0->LFLEN field to 0? Usually this field is used to determine the length of the received packets. The reception will then end when the full packet is received, regardless of the MAXLEN configuration. Either way, it should be fine to update the field between each time you start the radio receive mode.
Best regards,
Jørgen
Hi !
1. Yes this is proprietary radio and whitening enabled on both side.
I look around and find code https://github.com/iot-chalmers/BlueFlood/blob/master/examples/nrf-glossy/nrf-radio-driver.c#L74
where channel is written to DATAWHITEIV register. Have it sense or not for nRF52840 ?
2. I mean the next state machine. I would like to receive 64 bytes during known timeslot. I have timer what cancel RX state at the end of timeslot. But if RX is really started, I would like to have END event after 64 bytes as fast as possible. Other side can send 64 or 255 but I need 64 and not willing to wait when END is appears after 255.
What kind of registers have sense to program for stop RX at 64 bytes. If 64 have valid CRC , sw moving to the next state,
if something else, it should be possible to know before timeslot Timer expired.
Regards,
Eugene
Hi !
1. Yes this is proprietary radio and whitening enabled on both side.
I look around and find code https://github.com/iot-chalmers/BlueFlood/blob/master/examples/nrf-glossy/nrf-radio-driver.c#L74
where channel is written to DATAWHITEIV register. Have it sense or not for nRF52840 ?
2. I mean the next state machine. I would like to receive 64 bytes during known timeslot. I have timer what cancel RX state at the end of timeslot. But if RX is really started, I would like to have END event after 64 bytes as fast as possible. Other side can send 64 or 255 but I need 64 and not willing to wait when END is appears after 255.
What kind of registers have sense to program for stop RX at 64 bytes. If 64 have valid CRC , sw moving to the next state,
if something else, it should be possible to know before timeslot Timer expired.
Regards,
Eugene