How to get ANT tx timestamp

[bgarrood]

I need to synchronise a time stamp on ant ANT slave with the master.  Timesync would be ok but the message has to be acknowledged which ant timesync messages cannot do.

I can do my own timesync if I know what time the message is actually being sent by the ANT stack.  I can get the timestamp on the tx event, but this is a few ticks after the actual message was sent I presume (at least it is on the rx event).  I don't see any way to get the RTC timestamp of when the message was asent

Is there a way I can get the time when the message was actually sent?

Thank you.

[Kenneth]

I don't know how accurate you need the timing here, but typically it should be a pretty consistent and fixed offset between the data sent event on the master and data received event on the slave, so if you measure with a logic analyzer the timing difference between the two events, you should be able to use this offset to compensate relatively accurate in general. I am not aware of any other way of doing this really.

Kenneth

[bgarrood]

Thank you Kenneth.  Do you have any links showing how to use a logic analyzer, in particular to compare timings of slave and master events?  I am using segger embeddded studio.

[Kenneth]

I was thinking to simply toggle a GPIO when the mentioned events occur, and measure the distance on a oscilloscope or logic analyzer. What is your timing accuracy requirements here? If it's in the few tens of uA this should be fairly straight forward as mentioned, if you require few us, then I don't expect you will be able to do this in any way.

Kenneth

[bgarrood]

Oh yes, good idea.  Thank you.  Do you expect the time offset between actual ANT RX and RX event firing (I measure approx 0.2ms by comparing ANT timestamp to RTC clock value in ant event handler), and actual ANT TX and TX event firing to be consistent?

[Kenneth]

I would expect these events to be pretty consistent for a specific configuration at least, but if you do changes (e.g. add more channels etc) then I suggest to re-verify the timing.

Kenneth

[bgarrood]

Understood.  Thanks again for the help.  With this in mind I think I can figure out what I need with logic analyser.