sample fat_fs

[TF mulder]

Hi,

I'm trying the  sample fat_fs  on the nRF5340 DK

1) It does build, but there is awarning

CMake Warning at D:\nRfConnect\v1.8.0\zephyr\CMakeLists.txt:722 (message):
No SOURCES given to Zephyr library: drivers__disk

2) looked with the debugger: in the main() it reaches the  LOG_ERR("Storage init ERROR!");

void main(void)

if (disk_access_init(disk_pdrv) != 0) {

LOG_ERR("Storage init ERROR!");

 

Could you please comment on the above 2 points ?

What steps should i make to have a SD-card running,  is using sample fat_fs the way to go ?

Best Regards,

Theo

[TF mulder]

Hi Simon,

Thanks for the help.

i added  nrf5340dk_nrf5340_cpuapp.overlay   with the same content as nrf52840_blip.overlay

(added in VisualStudioCode  at input files,  the tool places the file   nrf5340dk_nrf5340_cpuapp.overlay  in the  fat_fs-directory, not in the fat_fs/boards directory)

i placed the same content from nrf52840_blip.overlay   into the  nrf5340dk_nrf5340_cpuapp.overlay

it showed 2 problems:   wiggle-line under &spi1  and a wiggle-line under sdhc@0

I altered &spi1 into &spi2   now the 2 problems where gone.  so did a prestine-build, and looked in the zephyr.dts

in there i found:

spi2: spi@b000 {
#address-cells = < 0x1 >;
#size-cells = < 0x0 >;
reg = < 0xb000 0x1000 >;
interrupts = < 0xb 0x1 >;
status = "okay";
label = "SPI_2";
compatible = "nordic,nrf-spim";
sck-pin = < 0x2f >;
miso-pin = < 0x2e >;
mosi-pin = < 0x2d >;
cs-gpios = < &gpio0 0x11 0x0 >;
sdhc0: sdhc@0 {
compatible = "zephyr,mmc-spi-slot";
reg = < 0x0 >;
status = "okay";
label = "SDHC0";
spi-max-frequency = < 0x16e3600 >;
};

So now the pins ..   does sck-pin <0x2f> means   47 -> 47-32=15   so P1.15    correct??   (and so on for 0x2e, 0x2d)

in the nrf5340 dk schematic i find   p1.15  on GPIO_IF2 D13  ... so ok 

But now the cs-gpios   &gpio0 0x11 0x0        does this mean gpio0   -> P0.00    or  0x11->17-> P0.17  

P0.00 would be OK  (GPIO_IF3 / d14)   but  P0.17 is QSPI_clk (SB21)  so ocuppied.

i will try  to connect a sd-card on the pins  P1.15, P1.14, P1.13   and the CS on P0.00  ..

Then bonus question:  could i alter the pins to different location?, how is that being done in the software ?

Looking forward on your comments Simon,  thanks.

Best Regards,

Theo

[Simon]

TF mulder said:

it showed 2 problems:   wiggle-line under &spi1  and a wiggle-line under sdhc@0

The wiggle-line under spi2 might be because another peripheral using the sampe ID and base address is enabled (read more about this in Peripherals with shared ID and Peripheral instantiation). But It seems like spi2 is enabled by default for the nRF5340dk_nrf5340_cpuapp, so I think using that should be fine. By the way, the VS Code extension os often a bit more strict than the compiler, so I would suggest you to build it, and if that works, you're good. Read more about this in Device Tree Overlay throws up warnings. 

TF mulder said:

So now the pins ..   does sck-pin <0x2f> means   47 -> 47-32=15   so P1.15    correct??   (and so on for 0x2e, 0x2d)

You have understood it correctly

TF mulder said:

But now the cs-gpios   &gpio0 0x11 0x0        does this mean gpio0   -> P0.00    or  0x11->17-> P0.17  

If you look at the original overlay, it may make more sense https://github.com/nrfconnect/sdk-zephyr/blob/v2.7.99-ncs1/samples/subsys/fs/fat_fs/boards/nrf52840_blip.overlay#L9 

It means that is uses port 0 and pin 17, so P0.17.

Read more about the cs-gpios field in zephyr/dts/bindings/spi/spi-controller.yaml

TF mulder said:

i will try  to connect a sd-card on the pins  P1.15, P1.14, P1.13   and the CS on P0.00  ..

Try that, but use P0.17 instead of P0.00

TF mulder said:

Then bonus question:  could i alter the pins to different location?, how is that being done in the software ?

I should have informed you about that initially. You can set all the other fields in the overlay file as well. For example if you want to set miso and mosi yourself, you can set the following in the file \fat_fs\boards\nrf5340dk_nrf5340_cpuapp.overlay:

&spi2 {
    status = "okay";
    compatible = "nordic,nrf-spim";
    sck-pin = < 47 >;
    miso-pin = < 46 >;
    mosi-pin = < 45 >;
    cs-gpios = < &gpio0 17 0x0 >;
    sdhc0: sdhc@0 {
        compatible = "zephyr,mmc-spi-slot";
        reg = < 0x0 >;
        status = "okay";
        label = "SDHC0";
        spi-max-frequency = < 0x16e3600 >;
    };
};

Best regards,

Simon

[TF mulder]

Hi Simon,

Thanks again for the valuable info.  (definitely more studying on my side :-)

I connected all  and using p0.17 for the cs., and double, double checked.

unfortunately, no cigar.., still not working..   it still hits the LOG_ERR("Storage init ERROR!");  (as with my original question 2) )

maybe relevant to mention .. ??

in de 'input-files'  there are a few problems signaled:

-in the file 'nrf5340dk_nrf5340_cpuapp.dts'  a wiggle-line (at line-13)   compatible = "nordic,nrf5340-dk-nrf5340-cpuapp";

-in the file ''nrf5340_cpuapp_qkaa.dtst 3-wigglles (at line 24)

compatible = "nordic,nRF5340-CPUAPP-QKAA", "nordic,nRF5340-CPUAPP", "nordic,nRF53", "simple-bus";

 wiggles under all exept "simple-bus".

--

then to be sure the connections i made to the sd-card  ( im using: https://www.sparkfun.com/products/544 )

p1.15  connected to 'sck'

p1.14 connected to 'DO'

p1.13 connected to 'DI'

p0.17 connected to 'CS'

vdd   connected to 'VCC'

gnd connected to 'GND'

Please your comments again.. (lets nail this :-)

Best Regards,

Theo

[Simon]

Could you try setting the cs-gpios to GPIO_ACTIVE_LOW (0x01) instead, like it's done in Any one tested with Strontium micro HCSD card? I foll.... and in central_nfc_pairing/nrf52840dk_nrf52840.overlay, so it looks like this: cs-gpios = < &gpio0 17 GPIO_ACTIVE_LOW>;.

Also, try to add CONFIG_GPIO=y and CONFIG_SPI_NRFX_RAM_BUFFER_SIZE=8 in the prj.conf as mentioned in NRF9160 SD card access via SPI and Reading SD card on nRF9160dk.

Hopefully this will make it work

TF mulder said:

maybe relevant to mention .. ??

in de 'input-files'  there are a few problems signaled:

-in the file 'nrf5340dk_nrf5340_cpuapp.dts'  a wiggle-line (at line-13)   compatible = "nordic,nrf5340-dk-nrf5340-cpuapp";

-in the file ''nrf5340_cpuapp_qkaa.dtst 3-wigglles (at line 24)

compatible = "nordic,nRF5340-CPUAPP-QKAA", "nordic,nRF5340-CPUAPP", "nordic,nRF53", "simple-bus";

 wiggles under all exept "simple-bus".

All the fields you mention where the squiggly lines appears are already defined by default by the nRF5340DK board/soc dts board files (see https://github.com/nrfconnect/sdk-zephyr/tree/v2.7.99-ncs1/boards/arm/nrf5340dk_nrf5340 and https://github.com/nrfconnect/sdk-zephyr/tree/v2.7.99-ncs1/dts/arm/nordic), so it shouldn't be any issue. What you need ot pay attention to is to look for warnings/errors in the build log output, not the warnings the VS Code extensions generates, so if the build log don't contain any warnings/error you are completely fine. We are aware that the warnings generated by the VS Code extension may cause confusion for customer, as most of them are relevant for when creating a custom board, but not for default board where we've consciously decided to break them, I discussed this with the developers some weeks ago and they are aware of this, and hopefully we can come up with a solution to get rid of them. Read more about this in Device Tree Overlay throws up warnings. 

Best regards,

Simon

[TF mulder]

Hi Simon,

Again nothing helps.., i now looked on a oscilloscope to the signals.., there is nothing there, (as if the GPIO-pins are just not cofigured)..

Where can i check/see the true configurations of the pins?

And ofcouse:

there is still the warning of my original question:

1) It does build, but there is awarning

CMake Warning at D:\nRfConnect\v1.8.0\zephyr\CMakeLists.txt:722 (message):
No SOURCES given to Zephyr library: drivers__disk

Looking forward to your answer..

Best Regards,

Theo

[Simon]

Hmm.. I'm sorry it's that much hassle getting it to work

I will take a deep dive next week and see if I can get to the bottom of it

Best regards,

Simon