A silly question about timer register triggers

[matangk]

I'm sorry. This must be trivial to all of you. I'm a beginner with nrf52 programming, and I saw several examples that refer to timers TASK_START, TASK_CLEAR, TASK_STOP. Everywhere, it just sets them to "1". However the datasheet says that it's a trigger operation (edge triggered as I understand it).

So.. What resets the trigger flag then? Is it automatic? After how many clock cycles? I searched in the datasheet and online tutorials but I'm clearly missing the answer.

Thanks in advance.

[Elfving]

Hey again,

I'm sorry.

No problem at all!

So.. What resets the trigger flag then?

It isn't edge triggered.

Those are write only registers, they won't be reset back to zero. Every time you write 1 to the register the internal task gets activated. which starts the internal task signal. You don't have to worry about resetting them to 0, or worry about activating them too frequently.

Regards,

Elfving

[matangk]

Ok.. thanks. A bit cryptic there.. So edge triggered or not it must have some auto-reset, I guess?

[Nguyen Hoan Hoang]

No, you reset it by writing a 0 to the EVENTS_?? registers.  EVENTS_COMPARE[I] = 0 for triggered events.  EVENTS_OVRFLW = 0 to reset overflow events

See implementation here 

Low freq clock : https://github.com/IOsonata/IOsonata/blob/master/ARM/Nordic/src/timer_lf_nrfx.cpp

High freq clock : https://github.com/IOsonata/IOsonata/blob/master/ARM/Nordic/src/timer_hf_nrfx.cpp

[matangk]

So.. resetting the match compare resets the timer task registers? It makes sense since resetting the match should in practice indicate the end of a desired timer operation. Though not very intuitive for me.. Thanks!

[Nguyen Hoan Hoang]

not totally, that reset the trigger interrupt.  To stop the trigger completely is another thing. see the disable trigger function

[Elfving]

For more info on the TIMER you can read about it in the product specification. You can think of it as it being automatically reset after one clock cycle, but it isn't edge triggered. It is guaranteed to take effect within one clock cycle.

Regards,

Elfving

[matangk]

Well there's a contradiction then between you and Nguyen's reply...

What he says is:

"you reset it by writing a 0 to the EVENTS_?? registers.  EVENTS_COMPARE[I] = 0 for triggered events. "

You, however, say that the timer tasks TASK_START, TASK_CLEAR, TASK_STOP are "being automatically reset after one clock cycle" (essentially a single clock cycle one shot).

so.. which one is it?

[Elfving]

Nguyen is talking about EVENTS, which can affect TASKS. I am talking about TASKS in general, which I assumed was what you were asking about.

Regards,

Elfving

[matangk]

Hi,

Thanks for the answer. My question was not general about tasks. It was specific about timers'  TASK_START, TASK_CLEAR, TASK_STOP tasks and what sets their flag back to zero. both of you are giving contradicting answer:

1. You say that it happens automatically after one clock cycle.

2. Nguyen says that I must write "0" to EVENTS_COMPARE[X] to reset the triggered events flag (also can happen on it's own when timer's done).

Which is the correct answer in this specific situation?

Thanks again

[Nguyen Hoan Hoang]

Once the compare event happened, it will generate an interrupt. If you don't set it to zero, you'll interrupt continuously.  The counter continues to count since the task is not stopped. After overflow, it will reset to zero and continue to count then reach the compare value again until you set the stop task. 

Brief, the task is for starting and stopping the counter.

[matangk]

Hi Nguyen.

I've completely lost you there.

1. For interrupts, I know that if an interrupt has been defined and attached, the compare event must be reset so it doesn't keep calling the interrupts. That was not my question.

2. I asked about what brings the timer START, STOP, and CLEAR task flags back to 0, after a program sets them to 1, since in the examples that I saw this isn't done explicitly.

3. As per Elfving when these tasks are executed, the flag goes to 0 automatically one clock cycle later.

Can you please confirm or contradict? My question has nothing to do with compare or overflow.

Thanks again