SPI bus need to be dedicated to nRF21540?

[Smart.Enrg]

Hi,

Referring to this - https://developer.nordicsemi.com/nRF_Connect_SDK/doc/latest/zephyr/reference/devicetree/bindings/net/wireless/nordic,nrf21540-fem.html
I understand SPI bus can be configured (in .dts) for FEM (nRF21540) interface purpose.

I have two questions:
1) Does this SPI instance (spi0 in this case) need to be dedicated to/ reserved for exclusive FEM use? i.e. can I use same SPI instance (spi0) for other device 
     such as SPI-Flash, or not? Also, if I don't have spare IO pins to create two SPI instances, can I interface/ control FEM with just 5 (tx-en, rx-en, pdn, ant-del,
     and mode) signals only, no SPI interface at all (SPI select/ CSN pulled up, not connected to nRF52 host IO?

2) If I end up using SPI, I may need to control SPI select/ CS through external IO mux, not directly from host nRF52's IO. Is there a way I can customize FEM-
     driver to accommodate this use case? Also, is there a sample code showing how nRF21540 is used?

Please advise. Thanks for your timely attention and help.

[Priyanka]

Hi,

You can use the SPI port shared between devices using the CS pins. Also, interfacing the pins directly or via mux is very similar from the application point of view. But FEM can use direct pin control, i.e. it can be controlled via GPIO pins.

Regards,

Priyanka

[Smart.Enrg]

Thanks Priyanka,

What I meant (sorry wasn't very clear) - use of SPI select lines via IO mux, not the 5x FEM interface signals.

So the question is - since I am using IO mux to generate SPI select signals - could you point me to where in
FEM/ SPI driver code I should implement select/ CSN control for FEM please?

Thanks

[PaKa]

Current nRF21540 SW solution does not support SPI control, it relies on GPIO control. For this you will need to have control of PDN, RX_EN and TX_EN. Mode, ANT_SEL, CSN, MOSI and SCK can be tied to power rails while the MISO can be left floating.

There is SPI gain control in the roadmap but timeline is still TBD. This will still require pin control for the PDN, RX_EN and TX_EN (and Mode/ANT_SEL if used).