GPIO output voltage does not go to VDD, it goes to 1.8V

[TML_YT]

I am trying nrf52840. The conditions are as follows.
-The development environment is SEGGER.
-nRF5_SDK_17.1.0
-The evaluation board is a DK from Raytac. There are two identical boards.
-The power supply is 3.3V generated by the regulator on the board, which is VDD.

Currently, for each function, I am trying out the sample program provided by SEGGER with some modifications.  For example, I have tried RF operation, simple GPIO function, external ADC control via SPI, internal SAADC, etc., and until a few days ago it was working without any problems.

(Problem)
But one day, I noticed that the H level of GPIO is 1.8V in all sample programs.
Even if I reload a program that was previously running with H level = VDD (3.3V), the H level remains at 1.8V.
The sample program in \examples \ peripheral \, even the "blinky" program, still has a H level of 1.8V.
To make matters worse, both of the two evaluation boards have the same problem.

By the way, I don't use VDDH, although the document says that the default H level of GPIO is 1.8V when VDDH is used.
Also, just to be sure, I checked with "nrf_power_dcdcen_get();" "nrf_power_dcdcen_vddh_get();" and the return value was "false" in both cases, so I think it is working with LDO of REG1.

(Question)
--What are the possible causes?
--What is the possible cause and how can I reset the H level of GPIO to VDD (3.3V)?

[Jørgen Holmefjord]

Hi,

-The evaluation board is a DK from Raytac. There are two identical boards.

Is this the board you are using? As far as I can see from the schematics and board images on that page, the board is configured in high voltage mode. R29 and R33 is not connected, while R34 is a 0 ohm resistor. This will connect 3.3V supply to VCC2 only, which is connected to VDDH. VDD is not connected/shorted to VDDH, which means that the chip is configured in high voltage mode. Notice that high voltage mode can operated down to 2.5V supply.

The GPIO voltage level is controlled through the UICR->REGOUT0 register when the chip is configured in high voltage mode. You can set it to 3.3V by writing '5' to this register. Note that there is a required difference in input voltage and output voltage of 0.3V, which means that the GPIO voltage will be limited to 3.0V when the VDDH supply is 3.3V.

You can write the UICR register through nrfjprog:

nrfjprog --memwr 0x10001304 --val 5

This must be done every time you erase UICR, for instance through "--eraseall" command.

Best regards,
Jørgen

[TML_YT]

Thank you for your reply.

I also found the following URL yesterday.
devzone.nordicsemi.com/.../how-to-change-gpio-o-p-voltage-level-to-3-3v-by-default-i-got-1-8v-only

In this
"nrfjprog --memwr 0x10001304 --val 5"
"nrfjprog -r"

I have tried the following and found that VL=3.3V.

I had just assumed that I was not in VDDH mode.

I'm glad that I found the direct cause, but I still have a few questions.

--Then why did it sometimes show VH=3.3V in the beginning?
The waveform recorded by the oscilloscope at that time was also about 3V, so I don't think I was mistaken.

--Also, why the return value of "nrf_power_dcdcen_get();" and "nrf_power_dcdcen_vddh_get();" is "false" in both cases?

I didn't make any changes to the power supply, and I didn't apply enough current to cause the regulator voltage to drop significantly.

[TML_YT]

Incidentally, the revision for 52480 was It was NRF52480_xxAA_REV2.

[Jørgen Holmefjord]

TML_YT said:

--Then why did it sometimes show VH=3.3V in the beginning?
The waveform recorded by the oscilloscope at that time was also about 3V, so I don't think I was mistaken.

I don't have a definitive answer to this, but if it was set to 3V, the DK was likely programmed with a firmware setting the REGOUT0 register to 3V. When you do a recover/eraseall/eraseuicr/chiperase/sectoranduicrerase operation, the configuration will be cleared and set back to the default 1.8V setting. The nRF5 SDK examples built for PCA10059 board (nRF52840 Dongle) will also set this register from the firmware.

TML_YT said:

--Also, why the return value of "nrf_power_dcdcen_get();" and "nrf_power_dcdcen_vddh_get();" is "false" in both cases?

DCDC is not automatically enabled by running the chip in high voltage mode. LDO regulators is the default configuration and can be used in both normal and high voltage mode. To enable DCDC regulators, you need to write the DCDCEN/DCDCEN0 registers. Note that you need to have the required additional components required by DCDC regulators mounted on your board before enabling these options. You should check the documentation of your board that this is present before enabling these options.

[TML_YT]

Thanks for your reply.

I asked Raytac and they said that the evaluation board is working with VDDH. And I understood that it is working with LDO, not DC/DC.

I think this trouble was caused by the fact that Raytac had set UICR-> REGOUT0=5 when it was shipped, but I did an All Erase and it went back to REGOUT0=7.
I think this is why, since All Erase, the board has a GPIO output H level of 1.8V and the SAADC input range is no longer as expected.

Finally, I have cleared things up.
Thank you very much for all your help and advice.