nRF51422/51822: what's the detailed power-on sequence when using softdevice + BootLoader + APP

[xiaoxuanzi]

I'm a newbie for Nordic development.

I just noticed that softdevice, app, and bootloader share the same CPU, RAM and Flash at the same time. This three software modules all has its own vector tables . I know that ARM CPU will run into reset vector table entry and take stack pointer as its MSP when PowerOn (or CPU system reset). So, for these three vector tables, which reset entry the CPU will run into ? what's the exact power-on sequence when softdevice, bootloader and APP are running ? Which document I can get this detailed flow chart or diagram ?

if I do not use DFU provided by bootloader, can I remove this software module in my device ?

Thank you in advance.

[Hung Bui]

Hi xiaozuanzi,

The MBR's(comes with the softdevice) vector table will be accessed first.

You can have a look at section B in this FAQ, to know more about the start-up sequence.