This post is older than 2 years and might not be relevant anymore
More Info: Consider searching for newer posts

How to reach maximum speed in ANT Advanced Burst Mode?

Good day!

Faced with the problem that I didn't get to run N5 Starter Kit (nRF51422) on maximum speed in Advanced Burst Mode, using ANTware II with ANTUSB-m to read packets. For now, maximum speed is 12,8kbps (200Hz * 8 bytes per packet * 8 bits in byte). How can I acheive 60kbps? (I think that is 300Hz * 24 bytes per packet * 8 bits in byte that is 57,6kbps). I have a lot of questions :)

  1. When I read documentation about Advanced Burst Mode, I meet everywhere a sentences about Hardware Signaling and Serial Interface. It's mean that I can't achieve that speed with built-in MCU only, and required external MCU? If so, why? (My current project doesn't imply any additional MCU).

  2. If I increase channel period (more than 200Hz) - the number of errors growth, the speed is slightly reduced. Wrong configuration? Think that I not fully configure Advanced Burst Mode. But I used sample code for it.

  3. All packets are marked as Burst (0x50), but if I enabling Advanced Burst Mode on Advanced Device Panel of ANTUSB-m - one packet goes in Burst (0x50), second in AdvancedBurst (0x72), with 2 bytes of data (ANTUSB-m or ANTwart II combines/rewrites bytes on the fly?). And no matter how I configure it, they always receive or 3 Burst, or combined 1 Burst and 1 Adv. Burst. Need 3 data bytes in 1 Adv. Burst.

LEDS - for oscilloscope. Check time needed for transmit 1 packet (10ms if receiver channel closed, ~15ms if opened).


Predefines:

BOARD_N5DK1, NRF51, ANT_STACK_SUPPORT_REQD, S210, SOFTDEVICE_PRESENT, SWI_DISABLE0


Short Code (not showed uart and twi related code):

#define APP_TIMER_PRESCALER    0      // Value of the RTC1 PRESCALER Register
#define APP_TIMER_MAX_TIMERS   BSP_APP_TIMERS_NUMBER // Maximum Number of Simultaneously Created Timers
#define APP_TIMER_OP_QUEUE_SIZE   2      // Size of Timer Operation Queues

// Channel configuration
#define CHANNEL_0      0  // ANT Channel 0
#define CHANNEL_0_RF_FREQUENCY   0x42u // Channel RF Frequency = (2400 + 66)MHz
#define CHANNEL_0_TX_CHANNEL_PERIOD  164u // Channel period 200 Hz (164u/32768 (sec))
#define CHANNEL_0_ANT_EXT_ASSIGN  0x00 // ANT Ext Assign
#define ANT_PUBLIC_NETWORK_KEY   {0xE8, 0xE4, 0x21, 0x3B, 0x55, 0x7A, 0x67, 0xC1} // ANT Public/Default Network Key
#define ANT_CUSTOM_TRANSMIT_POWER       0u // ANT Custom Transmit Power (Invalid/Not Used)

// Channel ID configuration
#define CHANNEL_0_CHAN_ID_DEV_NUM  1u // Device number
#define CHANNEL_0_CHAN_ID_DEV_TYPE  1u // Device Type
#define CHANNEL_0_CHAN_ID_TRANS_TYPE 1u // Transmission Type

// Miscellaneous defines
#define ANT_CHANNEL_DEFAULT_NETWORK  0 // ANT Channel Network
#define ANT_EVENT_MSG_BUFFER_MIN_SIZE 32u // Minimum size of ANT event message buffer
#define BURST_BLOCK_SIZE    24u // Size of data block transmitted via burst. Must be divisible by 8

void ant_channel_master_setup(void){} // Not showed because don't changed

void SoftDevice_Init(void){
 uint32_t err_code;
 
 // Enable SoftDevice
 err_code = sd_softdevice_enable(NRF_CLOCK_LFCLKSRC_XTAL_50_PPM, softdevice_assert_callback);
 APP_ERROR_CHECK(err_code);

 APP_TIMER_INIT(APP_TIMER_PRESCALER, APP_TIMER_MAX_TIMERS, APP_TIMER_OP_QUEUE_SIZE, NULL);

 // Set application IRQ to lowest priority
 err_code = sd_nvic_SetPriority(SD_EVT_IRQn, NRF_APP_PRIORITY_LOW); 
 APP_ERROR_CHECK(err_code);

 // Enable application IRQ (triggered from protocol)
 err_code = sd_nvic_EnableIRQ(SD_EVT_IRQn);
 APP_ERROR_CHECK(err_code);

 err_code = ant_stack_static_config();
 APP_ERROR_CHECK(err_code);

 // Setup Channel_0 as a TX Master
 ant_channel_master_setup();
 
 static uint8_t burst_setup[]={ADV_BURST_MODE_ENABLE,ADV_BURST_MODES_MAX_SIZE,0,0,0,0,0,0};
 err_code = sd_ant_adv_burst_config_set(burst_setup,sizeof(burst_setup));
 APP_ERROR_CHECK(err_code);

 uint8_t burst_wait=0; 
 err_code=sd_ant_burst_handler_wait_flag_enable(&burst;_wait);
 APP_ERROR_CHECK(err_code);
}


void main(void){
 uint32_t err_code;
 LEDS_CONFIGURE(LEDS_MASK);
 LEDS_OFF(LEDS_MASK);
 SoftDevice_Init();
 while (true){
  LEDS_OFF(BSP_LED_3_MASK);
  LEDS_ON(BSP_LED_1_MASK);
  for(int i=0; i<BURST_BLOCK_SIZE; i++){m_burst_data[i]=m_counter++;}
  do{
   LEDS_OFF(BSP_LED_1_MASK);
   LEDS_ON(BSP_LED_3_MASK);
   err_code=sd_ant_burst_handler_request(CHANNEL_0, BURST_BLOCK_SIZE, m_burst_data, (BURST_SEGMENT_START | BURST_SEGMENT_END));
  } while (err_code == NRF_ANT_ERROR_TRANSFER_IN_PROGRESS);
 }
}

Thanks in advance!

Parents
    • ant_message_types: yes, sd_ant_adv_burst_config_set is missing there, but with your burst_setup the whole buffer of BURST_BLOCK_SIZE must be transferred at full rate at once (not particular packets with 250ms spacing) - use longer buffer.
    • ant_device_firmware_update: the same

    as for www.thisisant.com/.../

    My approach:

    1. sd_ant_burst_handler_request
    2. wait for ANT event (whether EVENT_TRANSFER_TX_COMPLETED or EVENT_TRANSFER_TX_FAILED) got through sd_ant_event_get
    1. It was in code. Nothing changed.
    2. That's was my trouble.

    Without event system (by continuously pushing handler request and checking answer from it) - maximum speed are reached was 32768 b/s without tx fail message, and 35840 b/s with tx fail message (but actually tx not failed, all bytes was received correctly). Config was: BURST BLOCK SIZE - 128 bytes (more - was unstable), CHANNEL PERIOD - 128 Hz (256u) and 315 Hz (104u) respectively.

    With event system i reached 60288 b/s. Config are: BURST BLOCK SIZE - 5368 bytes (more - transmittion are not starting, and yes, that's for testing only :) ), CHANNEL PERIOD - 182 Hz (180u), but on so huge packets its can be smaller.

    Thanks!

Reply
    1. It was in code. Nothing changed.
    2. That's was my trouble.

    Without event system (by continuously pushing handler request and checking answer from it) - maximum speed are reached was 32768 b/s without tx fail message, and 35840 b/s with tx fail message (but actually tx not failed, all bytes was received correctly). Config was: BURST BLOCK SIZE - 128 bytes (more - was unstable), CHANNEL PERIOD - 128 Hz (256u) and 315 Hz (104u) respectively.

    With event system i reached 60288 b/s. Config are: BURST BLOCK SIZE - 5368 bytes (more - transmittion are not starting, and yes, that's for testing only :) ), CHANNEL PERIOD - 182 Hz (180u), but on so huge packets its can be smaller.

    Thanks!

Children
No Data
Related