delay after SPIS uninit

[kaluzevicius]

Hi,

Due to shortage of pins SPI CS is reconfigured as GPIO while SPI is not used. Soft device is not used.

Problem is the delay that is needed after nrfx_spis_uninit call. 

Is it possible to check some register to know if uninit is already finished to avoid delay function? 1ms is a quite long period of time to be in delay (it looks that 500us in not enough).

static void spis_generate_irq (void){
  
  nrfx_spis_uninit(&spis);

  nrfx_coredep_delay_us(1000); // magic delay is necesary

  nrf_gpio_cfg( APP_SPIS_CS_PIN,
                NRF_GPIO_PIN_DIR_OUTPUT,
                NRF_GPIO_PIN_INPUT_DISCONNECT,
                NRF_GPIO_PIN_PULLUP,
                NRF_GPIO_PIN_H0D1,
                NRF_GPIO_PIN_NOSENSE);

  nrf_gpio_pin_write(APP_SPIS_CS_PIN, 0);
  nrfx_coredep_delay_us(100);
  nrf_gpio_pin_write(APP_SPIS_CS_PIN, 1);
  nrfx_coredep_delay_us(100);
}

[kaluzevicius]

Hi,

Yes, I want to replace delay between SPI uninit and GPIO init.

If I understood correctly p_cb->state is set to NRFX_DRV_STATE_UNINITIALIZED just before leaving nrfx_spi_uninit() so it will always be equal to NRFX_DRV_STATE_UNINITIALIZED. Am I right? Or should I check another for another state?

BR
Julius

[Einarh]

Hello

I've asked about this internally, and was informed this was expected to work without a delay as the product specification states this:

When the peripheral is disabled, the pins will behave as regular GPIOs and use the configuration in their respective OUT bit field and PIN_CNF[n] register.

Can you please check the contents of NRF_SPISx->PSEL.MISO/MOSI/SCK/CSN after nrfx_spis_uninit?

And then NRF_P<number of port>->PIN_CNF[number of pin in port] after configuring GPIO?

-Einar