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Nordic Case Info
  • Case ID: 291333
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nRF52840 interrupt causing reset

MarekU

Hello guys,

I'm trying to run uart example from https://github.com/andenore/NordicSnippets/blob/master/examples/uart/main.c extended by interrupts call after transmission end on nRF52840 Dongle. I'm not able to successfully make CPU to call an interrupt handler. Bypassing "NVIC_SetVector", causes handler to not be called at all. And when I call "NVIC_SetVector" on configuration step and point to my interrupt handler, cpu restart after interrupt is enabled. I read that the interrupts are managed by the MBR that my board has, is this require some special configuration? I'm using an nRF Connect Programmer to upload hex file.

Programmer v3.0.0

I tried with and without softdevice, with handler name "UART0_IRQHandler" and "UARTE0_UART0_IRQHandler", with different interrupt priorities and different interrupts enabled. It's always same effect, restart or no reaction at all. As far I can tell without debugger, interrupt routine is never called. I will appreciate the help very much. I just started with nRF52 and I'm already pulling my hair out ;)

I'm using Visual Studio Code 1.68.1, with nRF Connect for VS Code Extension Pack v2022.5.1, project use nRF SDK in version 1.9.1.

uart.c

#include "uart.h"

#define RING_BUF_SIZE 4096
uint8_t txRingBufferData[RING_BUF_SIZE];
struct ring_buf txRingBuffer;
static uint8_t txBuffer[30];

void UART0_IRQHandler(void){
    if (NRF_UARTE0->EVENTS_ENDTX) {
        if (!ring_buf_is_empty(&txRingBuffer)) {
            uint32_t dataSize = ring_buf_get(&txRingBuffer, txBuffer, sizeof(txBuffer));
            NRF_UARTE0->TXD.PTR = (uint32_t)&txBuffer;
            NRF_UARTE0->TXD.MAXCNT = dataSize;
            NRF_UARTE0->TASKS_STARTTX = 1;
        }

        NRF_UARTE0->EVENTS_ENDTX = 0;
    }
}

void uart_init(uint32_t txPin, uint32_t rxPin, uint32_t baudrate) {
    // Disable UART
    NRF_UARTE0->ENABLE = (UARTE_ENABLE_ENABLE_Disabled << UARTE_ENABLE_ENABLE_Pos);
    
    // Configure the UARTE with no flow control, one parity bit and 115200 baud rate
	NRF_UARTE0->CONFIG = (UART_CONFIG_HWFC_Disabled << UART_CONFIG_HWFC_Pos) | (UARTE_CONFIG_PARITY_Excluded << UART_CONFIG_PARITY_Pos); 
	NRF_UARTE0->BAUDRATE = baudrate;
	
	// Select TX and RX pins
	NRF_UARTE0->PSEL.TXD = (txPin << UARTE_PSEL_TXD_PIN_Pos) & UARTE_PSEL_TXD_PIN_Msk;
	NRF_UARTE0->PSEL.RXD = (rxPin << UARTE_PSEL_RXD_PIN_Pos) & UARTE_PSEL_RXD_PIN_Msk;

    ring_buf_init(&txRingBuffer, sizeof(txRingBufferData), txRingBufferData);

    // Enable the UART (starts using the TX/RX pins)
	NRF_UARTE0->ENABLE = UARTE_ENABLE_ENABLE_Enabled << UARTE_ENABLE_ENABLE_Pos;

    // Enable UART TX End interrupt only
    NRF_UARTE0->INTENSET = (UARTE_INTENSET_ENDTX_Set << UARTE_INTENSET_ENDTX_Pos);

    NVIC_SetVector(UARTE0_UART0_IRQn, (uint32_t)UART0_IRQHandler);

    NVIC_SetPriority(UARTE0_UART0_IRQn, 6);
    NVIC_ClearPendingIRQ(UARTE0_UART0_IRQn);
    NVIC_EnableIRQ(UARTE0_UART0_IRQn);
}

void uart_send(const uint8_t *data, uint32_t size) {
    int rb_len = ring_buf_put(&txRingBuffer, data, size);
    // // if (rb_len < size) {
    // //     LOG_ERR("Drop %u bytes", size - rb_len);
    // // }

    uint32_t dataSize = ring_buf_get(&txRingBuffer, txBuffer, sizeof(txBuffer));
    NRF_UARTE0->TXD.PTR = (uint32_t)&txBuffer;
    NRF_UARTE0->TXD.MAXCNT = dataSize;
    NRF_UARTE0->EVENTS_ENDTX = 0;
    NRF_UARTE0->TASKS_STARTTX = 1;
}

main.c

#include "nrf.h"
#include "uart.h"

#define PIN_LED_STATUS (6UL)
#define PIN_LED_GREEN  (9UL)
#define PIN_LED_RED    (8UL)
#define PIN_LED_BLUE   (12UL)
#define PIN_TXD        (29)
#define PIN_RXD        (31)

void main(void) {
	NRF_P0->PIN_CNF[PIN_LED_STATUS] = (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos) |
                                (GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos) |
                                (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) |
                                (GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos) |
                                (GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos);
	NRF_P0->PIN_CNF[PIN_LED_RED] = (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos) |
                                (GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos) |
                                (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) |
                                (GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos) |
                                (GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos);
	NRF_P0->PIN_CNF[PIN_LED_BLUE] = (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos) |
                                (GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos) |
                                (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) |
                                (GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos) |
                                (GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos);
  
	NRF_P1->PIN_CNF[PIN_LED_GREEN] = (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos) |
                                (GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos) |
                                (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) |
                                (GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos) |
                                (GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos);
  
	NRF_P0->OUTSET = (1UL << PIN_LED_STATUS);
	NRF_P0->OUTSET = (1UL << PIN_LED_BLUE);
	NRF_P0->OUTCLR = (1UL << PIN_LED_RED);
	NRF_P1->OUTSET = (1UL << PIN_LED_GREEN);

	// Enable HF clock
	NRF_CLOCK->EVENTS_HFCLKSTARTED = 0;
	NRF_CLOCK->TASKS_HFCLKSTART = 1;
	while (NRF_CLOCK->EVENTS_HFCLKSTARTED == 0) {}

	// Enable LF clock
	NRF_CLOCK->LFCLKSRC = CLOCK_LFCLKSRC_SRC_Xtal;
	NRF_CLOCK->EVENTS_LFCLKSTARTED = 0;
    NRF_CLOCK->TASKS_LFCLKSTART = 1;
    while (NRF_CLOCK->EVENTS_LFCLKSTARTED == 0) {}

	NRF_P0->OUTSET = (1UL << PIN_LED_RED);
	NRF_P0->OUTCLR = (1UL << PIN_LED_STATUS);
	
	uart_init(PIN_TXD, PIN_RXD, UARTE_BAUDRATE_BAUDRATE_Baud115200);
	
	while (1) {
		uint8_t buf1[] = "Foo baz, some entry.\r\n";
		uart_send(buf1, sizeof(buf1));

		uint32_t volatile tmo = 5000000;
    	//while (tmo--);

		// uint8_t buf2[] = "Lorem ipsum dolor sit amet, consectetur adipiscing elit. Suspendisse aliquet placerat nunc vitae luctus.\r\n";
		// uart_send(buf2, sizeof(buf2));

		tmo = 10000000;
    	while (tmo--);
	}

}

Build log:

> Executing task: nRF Connect: Build: radio_module/build (active) <

Building radio_module
west build --build-dir e:\nRF52\Projects\radio_module\build e:\nRF52\Projects\radio_module

[0/1] Re-running CMake...
Including boilerplate (Zephyr base (cached)): C:/Users/Marek/ncs/v1.9.1/zephyr/cmake/app/boilerplate.cmake
-- Application: E:/nRF52/Projects/radio_module
-- Zephyr version: 2.7.99 (C:/Users/Marek/ncs/v1.9.1/zephyr), build: v2.7.99-ncs1-1
-- Found west (found suitable version "0.12.0", minimum required is "0.7.1")
-- Board: nrf52840dongle_nrf52840
-- Cache files will be written to: C:/Users/Marek/ncs/v1.9.1/zephyr/.cache
-- Found dtc: C:/Users/Marek/ncs/v1.9.1/toolchain/opt/bin/dtc.exe (found suitable version "1.4.7", minimum required is "1.4.6")
-- Found toolchain: gnuarmemb (c:/Users/Marek/ncs/v1.9.1/toolchain/opt)
-- Found BOARD.dts: C:/Users/Marek/ncs/v1.9.1/zephyr/boards/arm/nrf52840dongle_nrf52840/nrf52840dongle_nrf52840.dts
-- Generated zephyr.dts: E:/nRF52/Projects/radio_module/build/zephyr/zephyr.dts
-- Generated devicetree_unfixed.h: E:/nRF52/Projects/radio_module/build/zephyr/include/generated/devicetree_unfixed.h
-- Generated device_extern.h: E:/nRF52/Projects/radio_module/build/zephyr/include/generated/device_extern.h
-- Including generated dts.cmake file: E:/nRF52/Projects/radio_module/build/zephyr/dts.cmake
Parsing C:/Users/Marek/ncs/v1.9.1/zephyr/Kconfig
Loaded configuration 'E:/nRF52/Projects/radio_module/build/zephyr/.config'
Configuration saved to 'E:/nRF52/Projects/radio_module/build/zephyr/.config'
Kconfig header saved to 'E:/nRF52/Projects/radio_module/build/zephyr/include/generated/autoconf.h'
-- Configuring done
-- Generating done
-- Build files have been written to: E:/nRF52/Projects/radio_module/build
[1/154] Generating misc/generated/syscalls.json, misc/generated/struct_tags.json
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../src/uart.c: In function 'uart_send':
e:\nRF52\Projects\radio_module\src\uart.c:49:9: warning: unused variable 'rb_len' [-Wunused-variable]
   49 |     int rb_len = ring_buf_put(&txRingBuffer, data, size);
      |         ^~~~~~
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Parents
  • +1

    Hi,

    Is this part of a larger application, or is this your whole application?

    Can you try to use the Zephyr APIs to connect the interrupt to the handler?

    IRQ_DIRECT_CONNECT(UARTE0_UART0_IRQn, 6, UART0_IRQHandler, 0);
irq_enable(UARTE0_UART0_IRQn);

    Best regards,
    Jørgen

  • 0 in reply to Jørgen Holmefjord

    This is my whole application, I edit my post to add main.c file.

    It's working now! Thank you. Can you tell me, why this is working, and "direct api" is not? What's the difference?

    /**
 * @brief Initialize a 'direct' interrupt handler.
 *
 * This routine initializes an interrupt handler for an IRQ. The IRQ must be
 * subsequently enabled via irq_enable() before the interrupt handler begins
 * servicing interrupts.
 *
 * These ISRs are designed for performance-critical interrupt handling and do
 * not go through common interrupt handling code. They must be implemented in
 * such a way that it is safe to put them directly in the vector table.  For
 * ISRs written in C, The ISR_DIRECT_DECLARE() macro will do this
 * automatically. For ISRs written in assembly it is entirely up to the
 * developer to ensure that the right steps are taken.
 *
 * This type of interrupt currently has a few limitations compared to normal
 * Zephyr interrupts:
 * - No parameters are passed to the ISR.
 * - No stack switch is done, the ISR will run on the interrupted context's
 *   stack, unless the architecture automatically does the stack switch in HW.
 * - Interrupt locking state is unchanged from how the HW sets it when the ISR
 *   runs. On arches that enter ISRs with interrupts locked, they will remain
 *   locked.
 * - Scheduling decisions are now optional, controlled by the return value of
 *   ISRs implemented with the ISR_DIRECT_DECLARE() macro
 * - The call into the OS to exit power management idle state is now optional.
 *   Normal interrupts always do this before the ISR is run, but when it runs
 *   is now controlled by the placement of a ISR_DIRECT_PM() macro, or omitted
 *   entirely.
 *
 * @warning
 * Although this routine is invoked at run-time, all of its arguments must be
 * computable by the compiler at build time.
 *
 * @param irq_p IRQ line number.
 * @param priority_p Interrupt priority.
 * @param isr_p Address of interrupt service routine.
 * @param flags_p Architecture-specific IRQ configuration flags.
 */
 #define IRQ_DIRECT_CONNECT(irq_p, priority_p, isr_p, flags_p) \
	ARCH_IRQ_DIRECT_CONNECT(irq_p, priority_p, isr_p, flags_p)

    It's sounds like this method should be used in user code. Is that a case?

Reply
  • 0 in reply to Jørgen Holmefjord

    This is my whole application, I edit my post to add main.c file.

    It's working now! Thank you. Can you tell me, why this is working, and "direct api" is not? What's the difference?

    /**
 * @brief Initialize a 'direct' interrupt handler.
 *
 * This routine initializes an interrupt handler for an IRQ. The IRQ must be
 * subsequently enabled via irq_enable() before the interrupt handler begins
 * servicing interrupts.
 *
 * These ISRs are designed for performance-critical interrupt handling and do
 * not go through common interrupt handling code. They must be implemented in
 * such a way that it is safe to put them directly in the vector table.  For
 * ISRs written in C, The ISR_DIRECT_DECLARE() macro will do this
 * automatically. For ISRs written in assembly it is entirely up to the
 * developer to ensure that the right steps are taken.
 *
 * This type of interrupt currently has a few limitations compared to normal
 * Zephyr interrupts:
 * - No parameters are passed to the ISR.
 * - No stack switch is done, the ISR will run on the interrupted context's
 *   stack, unless the architecture automatically does the stack switch in HW.
 * - Interrupt locking state is unchanged from how the HW sets it when the ISR
 *   runs. On arches that enter ISRs with interrupts locked, they will remain
 *   locked.
 * - Scheduling decisions are now optional, controlled by the return value of
 *   ISRs implemented with the ISR_DIRECT_DECLARE() macro
 * - The call into the OS to exit power management idle state is now optional.
 *   Normal interrupts always do this before the ISR is run, but when it runs
 *   is now controlled by the placement of a ISR_DIRECT_PM() macro, or omitted
 *   entirely.
 *
 * @warning
 * Although this routine is invoked at run-time, all of its arguments must be
 * computable by the compiler at build time.
 *
 * @param irq_p IRQ line number.
 * @param priority_p Interrupt priority.
 * @param isr_p Address of interrupt service routine.
 * @param flags_p Architecture-specific IRQ configuration flags.
 */
 #define IRQ_DIRECT_CONNECT(irq_p, priority_p, isr_p, flags_p) \
	ARCH_IRQ_DIRECT_CONNECT(irq_p, priority_p, isr_p, flags_p)

    It's sounds like this method should be used in user code. Is that a case?

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