2022 July 12 - QDEC - Interrupt.zip
Hi,
I'm working through the QDEC using the nRF2840 evaluation board and I've run into some confusion.
- I have trouble getting the ACC or ACCREAD registers to actually accumulate over time. If I want to keep track of increments, I have to record this manually using the interrupt and an external variable. I can't just rely on the system to increment ACC by itself.
- The documentation says that the QDEC samples at a rate of 1MHz. I'm guessing the device uses oversampling, scaling this 1uS rate down to 128uS because the smallest SAMPLEPER you can select is 128uS.
- How does this change if I select debounce enabled?
- Given debounce enabled, does the system still evaluate a sample every 128uS? Or is it every 258uS?
- Given debounce enabled, is ACC still delayed by one sample, as mentioned in the QDEC documentation?
- Does ACC and or accread get cleared every time I go to read it with a nrf_qdec_accread_get() function?
I don't want to have ongoing interrupts to manage this hardware peripheral. I want it to accumulate on its own, requiring servicing perhaps only if there is an overflow or an invalid state transition. How does Nordic recommend enabling this behavior?
Also
I have been through the provided nRF52 example. I didn't find my questions answered by that example.
Also also,
Is it possible to trigger an interrupt event given an invalid state transition? If so, how? What is the NRF_QDEC_EVENT_????? reference for it?
