nrf_drv_spi_transfer always returns all 0's from device.

[davidb]

I'm using SDK 14.2.0.

I'm trying to read the device ID register from ISM330DHCX accelerometer this way:

ret = nrf_drv_spi_transfer(&m_spi[Instance], &reg_addr, 1, read_temp, length + 1);

In the function nrf_drv_spi_transfer() NRF_DRV_SPI_USE_SPIM and SPIM_PRESENT are both true and nrfx_spim_xfer() is called.

I can't figure out if nrfx_spim_xfer() is using the parameters passed by nrf_drv_spi_transfer() above. Is it using reg_addr? Is it using the correct chip select?

My spi config:

const nrf_drv_spi_config_t spi_ism330_config =
{ \
.sck_pin = NRF_GPIO_PIN_MAP(0, 8), \
.mosi_pin = NRF_GPIO_PIN_MAP(0, 6), \
.miso_pin = NRF_GPIO_PIN_MAP(0, 5), \
.ss_pin = NRF_GPIO_PIN_MAP(0, 7), \
.irq_priority = SPI_DEFAULT_CONFIG_IRQ_PRIORITY, \
.orc = 0xFF, \
.frequency = NRF_DRV_SPI_FREQ_125K, \
.mode = NRF_DRV_SPI_MODE_3, \
.bit_order = NRF_DRV_SPI_BIT_ORDER_MSB_FIRST \
};

I have tried to read the device ID register of a different device using this same procedure and it also returns 0x00, 0x00. I have a feeling there is some sdk config issue.

1258.sdk_config.h

[davidb]

Is there documentation for nRF52840-DK board that lists the GPIO pins that are available for customer use, or which ones are reserved?

David

[Simonr]

Yes, the Connector Interface section in the nRF52840 DK user guide explains what GPIOs have default settings and not.

• P0.00 and P0.01 are used for the 32.768 kHz crystal and are not available on the connectors. For more information, see 32.768 kHz crystal on page 30. 
• P0.05, P0.06, P0.07, and P0.08 are used by the UART connected to the interface MCU. For more information, see Virtual COM port on page 14. 
• P0.09 and P0.10 are by default used by NFC1 and NFC2. For more information, see NFC antenna interface on page 32. 
• P0.11–P0.16 and P0.24–P0.25 are by default connected to the buttons and LEDs. For more information, see Buttons and LEDs on page 28. 
• 0.17 and 0.19–0.23 are by default connected to the external memory. For more information, see External memory on page 25.

Best regards,

Simon

[davidb]

I have disabled the uart in sdk_config.h:

// <e> NRFX_UARTE_ENABLED - nrfx_uarte - UARTE peripheral driver
//==========================================================
#ifndef NRFX_UARTE_ENABLED
#define NRFX_UARTE_ENABLED 0

I think that should do the trick but would like to clarify if this will actually disable the uart.

I still receive 0x00 after moving my device to GPIO 1.10, 1.11,1.12,1.3.

This is the code I'm using:

#include "nrf_drv_spi.h"

const nrf_drv_spi_config_t spi_config =
{ \
.sck_pin = NRF_GPIO_PIN_MAP(1, 11), \
.mosi_pin = NRF_GPIO_PIN_MAP(1, 13), \
.miso_pin = NRF_GPIO_PIN_MAP(1, 10), \
.ss_pin = NRF_GPIO_PIN_MAP(1, 12), \
.irq_priority = SPI_DEFAULT_CONFIG_IRQ_PRIORITY, \
.orc = 0xFF, \
.frequency = NRF_DRV_SPI_FREQ_1M, \
.mode = NRF_DRV_SPI_MODE_3, \
.bit_order = NRF_DRV_SPI_BIT_ORDER_MSB_FIRST \
};

#define TEST_SPI_INSTANCE 0 /**< SPI instance index. */

static uint8_t  read_temp[16];

void spi_test_routine(void)
{
uint8_t reg_addr = 15;

reg_addr |= 0x80;  /* set read command bit */
static const nrf_drv_spi_t spi = NRF_DRV_SPI_INSTANCE(TEST_SPI_INSTANCE); /**< SPI instance. */
read_temp[0] = 0x55;
read_temp[1] = 0xaa;
read_temp[2] = 0xbb;

APP_ERROR_CHECK(nrf_drv_spi_init(&spi, &spi_config, spi_event_handler, NULL));
spi_xfer_done = false;
APP_ERROR_CHECK(nrf_drv_spi_transfer(&spi, &reg_addr, 1, read_temp, 2));

while (!spi_xfer_done)
{
__WFE();
}

spi_xfer_done = false;

}

After running the test function read_tmp[0] and read_tmp[1] are 0x00.

I verified the device has correct power and ground.

Dave