nrf_drv_spi_transfer always returns all 0's from device.

[davidb]

I'm using SDK 14.2.0.

I'm trying to read the device ID register from ISM330DHCX accelerometer this way:

ret = nrf_drv_spi_transfer(&m_spi[Instance], &reg_addr, 1, read_temp, length + 1);

In the function nrf_drv_spi_transfer() NRF_DRV_SPI_USE_SPIM and SPIM_PRESENT are both true and nrfx_spim_xfer() is called.

I can't figure out if nrfx_spim_xfer() is using the parameters passed by nrf_drv_spi_transfer() above. Is it using reg_addr? Is it using the correct chip select?

My spi config:

const nrf_drv_spi_config_t spi_ism330_config =
{ \
.sck_pin = NRF_GPIO_PIN_MAP(0, 8), \
.mosi_pin = NRF_GPIO_PIN_MAP(0, 6), \
.miso_pin = NRF_GPIO_PIN_MAP(0, 5), \
.ss_pin = NRF_GPIO_PIN_MAP(0, 7), \
.irq_priority = SPI_DEFAULT_CONFIG_IRQ_PRIORITY, \
.orc = 0xFF, \
.frequency = NRF_DRV_SPI_FREQ_125K, \
.mode = NRF_DRV_SPI_MODE_3, \
.bit_order = NRF_DRV_SPI_BIT_ORDER_MSB_FIRST \
};

I have tried to read the device ID register of a different device using this same procedure and it also returns 0x00, 0x00. I have a feeling there is some sdk config issue.

1258.sdk_config.h

[Simonr]

Hi

Just by looking at the code snippets you have provided I'm not able to point out what is going wrong here I'm afraid. Have you done any debugging to see if all your functions return correctly or if they report any error codes? I see that the RTT backend is enabled by default, so using SEGGERs RTT viewer should let you see any errors reported by the device. You can also check out this thread on the DevZone on how to get started debugging your application.

Best regards,
Simon

[davidb]

I moved my device to GPIO 1.10, 1.11, 1.12, 1.13 and spi works now.

I disabled uart so I can use gpio 0.5, 0.6, 0.7, 0.8. 

#define NRFX_UARTE_ENABLED 0

#define NRFX_UART_ENABLED 0

Hopefully this will free up gpio 0.5, 0.6, 0.7, 0.8.

Will this prevent RTT viewer from working?

Dave

[Simonr]

Hi Dave

The RTT will still work when using the pins 0.05-0.08 for other operations. RTT logging goes over the SWD pins.

Best regards,

Simon