Is this the \nRF5_SDK_17.1.0_ddde560\examples\peripheral\spi example in nRF5 SDK?
Looking at the sdk_config.h file I can find that EasyDMA is enabled by SPI0_USE_EASY_DMA 1, so I don't see any reason why nrf_drv_spi_transfer() should have any delay between each byte.
Thank you for your patience, I read the driver's code and I know the driver write one byte at a time, but I can't understand the clock have so big gap between two bytes. Is the SPI's CLK right in my pasted picture? Can I make the SPI clock continuation?
Without EasyDMA then after each byte is transmitted, then the SPI interrupt needs to execute, and next byte needs to be written from the SPI interrupt. This will cause a few us delay between each byte. If you need the SPI clock continuation then you need to use SPI with EasyDMA (SPIM_PRESENT), then the entire SPI transfer will occur in one go without any delay between bytes.
Without EasyDMA then after each byte is transmitted, then the SPI interrupt needs to execute, and next byte needs to be written from the SPI interrupt. This will cause a few us delay between each byte. If you need the SPI clock continuation then you need to use SPI with EasyDMA (SPIM_PRESENT), then the entire SPI transfer will occur in one go without any delay between bytes.
