SPI Pin configuration issue when migrated to v2.0.2

[Regie Roshan Magendiran]

Hi,

We are using nRF5340 and we are migrating to v2.0.2 NCS sdk from v1.9.1. 

In our design, the SPI MISO pin is P0.10. From the dev zone tickets, I found that this P0.10 pin is used by Network core's UART as well. 

In v1.9.1, I manually changed the UART pins in /zephyr/boards/arm/nrf5340dk_nrf5340_cpunet.dts file I also had to do the same change in the /zephyr/boards/arm/nrf5340_cpunet_reset.c. This fixed the issue and we were able to use P0.10 for SPI. 

But now when we migrated to v2.0.2, we are seeing the same issue.

I have modified the pin definitions in the nrf5340dk_nrf5340_cpuapp.overlay (this overlay is in our source folder) required for Pinctrl. I also did the change for UART pins in the  /zephyr/boards/arm/nrf5340dk_nrf5340_cpunet-pinctrl.dtsi. I do not see a cpunet_reset.c file in v2.0.2. 

Observations on debugging:

1. When MISO is configured as P0.10, SPI communication functions with the peripheral. I was able to see data output in MISO pin through the oscilloscope which means the SPI communication is functional. But the SPI driver's receiver buffer is empty. This was the reason why I think P0.10 pin is still used by network core.

2. Also, I tried out another pin, P0.4 using the nRF5340 devkit, everything works perfectly. I could see the SPI driver functioning. We were able to read data from the SPI peripheral as expected.

Below is the nrf5340dk_nrf5340_cpuapp.overlay added to our source folder,

&pinctrl {

    uart0_default_alt: uart0_default_alt {

        group1 {

            psels = <NRF_PSEL(UART_TX, 0, 24)>,

            <NRF_PSEL(UART_RTS, 0, 20)>;

        };

        group2 {

            psels = <NRF_PSEL(UART_RX, 0, 27)>,

            <NRF_PSEL(UART_CTS, 0, 21)>;

            bias-pull-up;

        };

    };

    uart0_sleep_alt: uart0_sleep_alt {

        group1 {

            psels = <NRF_PSEL(UART_TX, 0, 24)>,

                    <NRF_PSEL(UART_RX, 0, 27)>,

                    <NRF_PSEL(UART_RTS, 0, 20)>,

                    <NRF_PSEL(UART_CTS, 0, 21)>;

            low-power-enable;

        };

    };

    i2c1_default_alt: i2c1_default_alt {

        group1 {

           psels = <NRF_PSEL(TWIM_SDA, 1, 2)>,

                   <NRF_PSEL(TWIM_SCL, 1, 3)>;

                   bias-pull-up;

        };

    };

    i2c1_sleep_alt: i2c1_sleep_alt {

        group1 {

           psels = <NRF_PSEL(TWIM_SDA, 1, 2)>,

                   <NRF_PSEL(TWIM_SCL, 1, 3)>;

           low-power-enable;

        };

    };

    spi2_default_alt: spi2_default_alt {

        group1 {

            psels = <NRF_PSEL(SPIM_MOSI, 0, 9)>,

                   <NRF_PSEL(SPIM_SCK, 0, 8)>,

                    <NRF_PSEL(SPIM_MISO, 0, 10)>;

        };

        // group2 {

        //  psels = <NRF_PSEL(SPIM_MISO, 0, 7)>;

        //  bias-pull-down;

        // };

    };

    spi2_sleep_alt: spi2_sleep_alt {

        group1 {

           psels = <NRF_PSEL(SPIM_MOSI, 0, 9)>,

                   <NRF_PSEL(SPIM_SCK, 0, 8)>,

                   <NRF_PSEL(SPIM_MISO, 0, 10)>;

           low-power-enable;

        };

    };

};

&uart0

{

    pinctrl-0 = <&uart0_default_alt>;

    pinctrl-1 = <&uart0_sleep_alt>;

    pinctrl-names = "default", "sleep";

    status = "disabled";

    // current-speed = <115200>;

    // tx-pin = <24>;

    // rx-pin = <27>;

    // rx-pull-up;

    // rts-pin = <20>;

    // cts-pin = <21>;

    // cts-pull-up;

};

&uart1

{

    status = "disabled";

};

&uart2

{

    status = "disabled";

};

/ {

    chosen {

        /delete-property/ zephyr,bt-c2h-uart;

        };

};

&i2c1

{

    compatible = "nordic,nrf-twim";

    pinctrl-0 = <&i2c1_default_alt>;

    pinctrl-1 = <&i2c1_sleep_alt>;

    pinctrl-names = "default", "sleep";

    status = "okay";

};

&spi2

{

    compatible = "nordic,nrf-spim";

    pinctrl-0 = <&spi2_default_alt>;

    pinctrl-1 = <&spi2_sleep_alt>;

    pinctrl-names = "default", "sleep";

    status = "okay";

    // cs-gpios = <&gpio0 31 GPIO_ACTIVE_LOW>;

};

&adc {

    status = "okay";

};

Could you please let me know what I am missing here and how to fix this issue?

Regards,
Regie

[helsing]

Hi Regie,

If you look at the back of the board, you can see that P0.10 is used for 'CTS'. This is for communication with the Interface MCU on the DK. If you would like to use this pin for something else, it is required to make changes both to the DK and to sw. 

Try adding this to your .overlay file:

&gpio_fwd {

status = "disabled";

};

Here is the related commit for this: https://github.com/nrfconnect/sdk-zephyr/commit/81c48c3e684f1277b89e711b72366a5a676bc880

You would also need to flip a switch on the DK in order to disconnect the pin from the IF MCU. Which hw version of the DK are you using?

I have not yet tried this myself. I could to so next week.

[Regie Roshan Magendiran]

Thanks for the response!

The devkit I have is nRF5340dk - PCA10095 v1.0.0. But I was seeing the same issue in my custom board as well.
Now when I added gpio_fwd to the overlay, it worked both in the devkit and in our custom board. I didn't have to change any switch in devkit. So now P0.10 is configured as MISO. 

Thanks for sorting that out!

Regie