Reasoning behind nrf51-pwm-library implementation

[FormerMember]

Greetings,

Kudos for implementing a no glitch version of PWM with and without using timeslot.

github.com/.../nrf_pwm_noglitch.c.

Could the reasoning for the following be explained with the above PWM driver:

• Why is pwm_max_value and pwm_value multiplied by 2 used for the timer instead of just these values?
• Disabling of the PPI channels done in the IRQ routine? Could waiting for 1.5 or 2 times the PWM cycle work?

Also does this implementation have the infamous bug of the polarity inverting at times as mentioned in other posts in this forum? Thanks!

[Stefan Birnir Sverrisson]

Hi

Not yet sure about the two first questions that you ask. For your last question, this thread provides some reasoning for why the signal would flip and how to avoid it.

[FormerMember]

Updates from digging in: If I make sure that all the values that I pass to nrf_pwm_set_value is an even number it works well without multiplying pwm_max_value and pwm_value by two. Next step, figuring out why nrf_pwm_set_value can't handle odd numbers.