XIP problems with a custom board running nrf5340

Hi,

I'm trying to use XIP on our custom board running a nrf5340 with a different Flash memory than the one on the nrf5340-devkit.

The XIP worked on nrf5340dk, but now it's not working on the custom board. We are using a different Flash memory, W25Q64JW instead of the one on the devkit (MX25R64).

Not sure if it is the commands sent to the Flash that needs to be changed, but the commands looks pretty much the same on both flash memories.

Starting to think maybe that the problem is when trying to Flash the custom board, and specifically the external flash with the commands:

nrfjprog --qspicustominit --qspieraseall

nrfjprog --coprocessor CP_APPLICATION --sectorerase --qspisectorerase --program zephyr.hex --verify

How is the QSPI peripheral initiated with these commands?

The problem I have is that I get the following: "Usage Fault":

 ***** USAGE FAULT *****
[00:00:00.326,477] <err> os:   Attempt to execute undefined instruction
[00:00:00.326,507] <err> os: r0/a1:  0x00000000  r1/a2:  0x0000001c  r2/a3:  0x0000001b
[00:00:00.326,538] <err> os: r3/a4:  0x20001940 r12/ip:  0x10000001 r14/lr:  0x0000261f
[00:00:00.326,538] <err> os:  xpsr:  0x29000000
[00:00:00.326,568] <err> os: Faulting instruction address (r15/pc): 0x10000000

And this is the resultl when trying to flash the external flash:

nrfjprog --coprocessor CP_APPLICATION --sectorerase --qspisectorerase --program zephyr.hex --verify --log

Parsing image file.
Verifying programming.
ERROR: [  nRF53] - Data does not match in QSPI memory address range [0x00000000-0x00000060]
ERROR: [  nRF53] - QSPI memory verification failed
ERROR: [  nRF53] - Failed while verifying file zephyr.hex.
ERROR: Write verify failed.

So I don't think the code is actually flashed to the external memory.

BR

Parents
  • Hi,

    Have you added an overlay to define the correct flash chip? The MX25R64 is defined in the nRF5340 DK devicetree. If you are using a different flash chip you need to add an overlay with the correct config for that chip. You may reference part of this post for a similar flash chip, but that is for SPI and not QSPI.

    Best regards,
    Jørgen

  • Hi, I have modified the dts file for the qspi node..

    But not sure exactly what everything means in that node, very confusing. This is how the qspi node looks like now in the .dts file:

    &qspi {
    	status = "okay";
    	pinctrl-0 = <&qspi_default>;
    	pinctrl-1 = <&qspi_sleep>;
    	pinctrl-names = "default", "sleep";
    	w25q64: w25q64jw@0 {
    		compatible = "nordic,qspi-nor";
    		reg = <0>;
    		/* MX25R64 supports only pp and pp4io */
    		writeoc = "pp4o";
    		/* MX25R64 supports all readoc options */
    		readoc = "read4io";
    		sck-frequency = <8000000>;
    		label = "W25Q64";
    		jedec-id = [c2 28 17];
    		sfdp-bfp = [
    			e5 20 f1 ff  ff ff ff 03  44 eb 08 6b  08 3b 04 bb
    			ee ff ff ff  ff ff 00 ff  ff ff 00 ff  0c 20 0f 52
    			10 d8 00 ff  23 72 f5 00  82 ed 04 cc  44 83 68 44
    			30 b0 30 b0  f7 c4 d5 5c  00 be 29 ff  f0 d0 ff ff
    		];
    		size = <67108864>;
    		has-dpd;
    		t-enter-dpd = <10000>;
    		t-exit-dpd = <35000>;
    	};
    };

    But still, wondering what happens during the Flash procedure? Is this .dts config used when flashing the external memory?

Reply
  • Hi, I have modified the dts file for the qspi node..

    But not sure exactly what everything means in that node, very confusing. This is how the qspi node looks like now in the .dts file:

    &qspi {
    	status = "okay";
    	pinctrl-0 = <&qspi_default>;
    	pinctrl-1 = <&qspi_sleep>;
    	pinctrl-names = "default", "sleep";
    	w25q64: w25q64jw@0 {
    		compatible = "nordic,qspi-nor";
    		reg = <0>;
    		/* MX25R64 supports only pp and pp4io */
    		writeoc = "pp4o";
    		/* MX25R64 supports all readoc options */
    		readoc = "read4io";
    		sck-frequency = <8000000>;
    		label = "W25Q64";
    		jedec-id = [c2 28 17];
    		sfdp-bfp = [
    			e5 20 f1 ff  ff ff ff 03  44 eb 08 6b  08 3b 04 bb
    			ee ff ff ff  ff ff 00 ff  ff ff 00 ff  0c 20 0f 52
    			10 d8 00 ff  23 72 f5 00  82 ed 04 cc  44 83 68 44
    			30 b0 30 b0  f7 c4 d5 5c  00 be 29 ff  f0 d0 ff ff
    		];
    		size = <67108864>;
    		has-dpd;
    		t-enter-dpd = <10000>;
    		t-exit-dpd = <35000>;
    	};
    };

    But still, wondering what happens during the Flash procedure? Is this .dts config used when flashing the external memory?

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