Hello,
Is there any delay between when the reset pin is driven low and the actual reset of the chip. Would it be possible to sense the reset pin and perform some quick clean up tasks before the chip is reset?
Thanks, Ethan
Hello,
Is there any delay between when the reset pin is driven low and the actual reset of the chip. Would it be possible to sense the reset pin and perform some quick clean up tasks before the chip is reset?
Thanks, Ethan
According to the nRF51 product specification, the hold time for the reset pin is 0.2us. That's about 3 cycles, so even if you could sense the reset pin, it's not long enough to do any processing.
What sort of cleanup are you envisioning? Typically, an embedded application should be resilient in the face of an unexpected reset (for example, someone removing the battery, etc).
According to the nRF51 product specification, the hold time for the reset pin is 0.2us. That's about 3 cycles, so even if you could sense the reset pin, it's not long enough to do any processing.
What sort of cleanup are you envisioning? Typically, an embedded application should be resilient in the face of an unexpected reset (for example, someone removing the battery, etc).
Thanks, Kevin! That't not much time at all, ha! For sure, the application is resilient to unexpected reset was just wondering if there was any time there to maybe allow for a refactoring of some of those resilience measures to a clean up function.