nrfxlib Softdevice Controller crashes (hardfault) on nRF52832 but not on nRF52840 without Zephyr (baremetal)

Hi, We are trying to work with nrfxlib directly baremetal without Zephyr.  Were able to do advertising with it.  On nRF52832 the SDC crashes when we tried to set new advertising data by calling

sdc_hci_cmd_le_set_adv_data

On the nRF52840, everything works smoothly. 

We saw the debug symbols that the libsoftdevice_controller_multirole.a was compiled for S140.  Could this be the issue.  Can Nordic provide a version for the S132 ?

I aslo suspect other issue.  it could be that some how when compiling for the nRF52832 it cause some global variable inside the lib to be unaligned causing the crash (hardfault).

Please review the library code to make sure proper variable alignment or enable unaligned access for the gcc compiler when compiling the lib.

crash location : sym_OC5GPSERLPE7TKXSCU3QAZ62H3OM4MWFYV7WX2I() at 0x2f5f8

UPDATE : Sorry I was talking to fast about the the nRF52840.  It also crashes but I can confirm this.  The crash was cause by unaligned access within either the mpsl or the sec lib.

Compile my code by disabling all optimization works but not when optimization is enable.  The different is that when no optimization all global vars are word aligned while optimization will pack all global on a byte align. 

Thanks. 

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  • Any chance you could provide me a minimal version of your project so I can try to replicate this here? I'm not trying to be difficult with you, but I need to have something more concrete to go on before I can involve the developers.

    Nguyen Hoan Hoang said:
    In this case is a hardfault

    All fault events detected by the processor will trigger the hardfault exception unless you have enabled the other fault handlers in your code (i.e. Usage fault, memory managment fault, and Bus fault).

    Nguyen Hoan Hoang said:
    see the LDR into an unaligned address in R3

    I do not see where the unaligned access is. The ldrb instruction shown in your screenshot is just loading a byte from memory (RAM) into r3, so this operation can't be unaligned, at least.

    From the Cortex M4 Generic user Guide:

    (https://developer.arm.com/documentation/dui0553/latest/)

    Edit: I can't tell from the screenshots you posted what the r1 value was when the ldrb instruction was executed.

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