SAADC(two channel) Differencial Sampling by External 62.5KHz Clock Interrupt.

I am developing a product using the nRF52840.
I am currently running into a difficult problem. I inquired about it 2 years ago, but it has not been resolved.

I need to process Two Channel (Diffrencial) type saadc by using an external 62.5Khz interrupt.
However, the nRF52840 doesn't seem to be able to handle this speed.
The SAADC handler comes out too late.
I use s140_nrf52_7.2.0_softdevice.hex for soft device.

Please give me an answer on how to implement saadec two channel diffrencial type sampling at 62.5Khz rate.

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  • Hello,

    Maybe you can share a link to the case you had two years ago so I can see what was done at the time?

    Looking at the saadc chapter in the datasheet:
    https://infocenter.nordicsemi.com/topic/ps_nrf52840/saadc.html

    In specific Figure 4:
    https://infocenter.nordicsemi.com/topic/ps_nrf52840/ip/saadc/doc/image/saadc.svg 

    It looks like this should be possible for instance by a gpiote event->ppi->sample task, then once the buffer is full you get an END event which you can handle in the SAADC interrupt. Then you don't need to handle the data at 65kHz (~15us), but for instance every 1.5ms (assuming a 100byte buffer, likely you need to double buffer, so one buffer can fill up while you are handling the other). Also I expect you need to have a ppi between END event and START task, so the next buffer is used automatically when the END event occur.

    I expect the main problem here will be the throughput the BLE link must handle, e.g. if you assume every sample here is 10bit, and you are able to shift 3 10-bit samples into a 32bit word. Then you need a steady throughput of roughly 700kbps, and you can't expect to get this high throughput steadily over time, and I assume you are also interested in relative low latency here (e.g. of sub <100ms). 

    So I expect the problem here is not that the hardware can't handle the data throughput, the main limitiation will be the BLE link throughput.

    Best regards,
    Kenneth

Reply
  • Hello,

    Maybe you can share a link to the case you had two years ago so I can see what was done at the time?

    Looking at the saadc chapter in the datasheet:
    https://infocenter.nordicsemi.com/topic/ps_nrf52840/saadc.html

    In specific Figure 4:
    https://infocenter.nordicsemi.com/topic/ps_nrf52840/ip/saadc/doc/image/saadc.svg 

    It looks like this should be possible for instance by a gpiote event->ppi->sample task, then once the buffer is full you get an END event which you can handle in the SAADC interrupt. Then you don't need to handle the data at 65kHz (~15us), but for instance every 1.5ms (assuming a 100byte buffer, likely you need to double buffer, so one buffer can fill up while you are handling the other). Also I expect you need to have a ppi between END event and START task, so the next buffer is used automatically when the END event occur.

    I expect the main problem here will be the throughput the BLE link must handle, e.g. if you assume every sample here is 10bit, and you are able to shift 3 10-bit samples into a 32bit word. Then you need a steady throughput of roughly 700kbps, and you can't expect to get this high throughput steadily over time, and I assume you are also interested in relative low latency here (e.g. of sub <100ms). 

    So I expect the problem here is not that the hardware can't handle the data throughput, the main limitiation will be the BLE link throughput.

    Best regards,
    Kenneth

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