nrf5340 Low Frequency Timer (RTC)

[skajam66]

Hi,

Is there a known issue with the startup of the LF clock on the nrf5340 app core? I have scanned the nrf5340 errata but do not see anything of note.

I have this code snippet in the Bluetooth stack from our stack vendor:

  /* FIXME workaround for LF OSC startup. */
  nrf_clock_lf_src_set(NRF_CLOCK, NRF_CLOCK_LFCLK_Synth);
  nrfx_clock_lfclk_start();
  while (!nrfx_clock_lfclk_is_running());

With the above code, I was still getting occasional LF clock start up problems so I changed it to:

  /* LFCLKSRC external crystal pin configuration. */
  NRF_P0->PIN_CNF[0] = GPIO_PIN_CNF_MCUSEL_Peripheral << GPIO_PIN_CNF_MCUSEL_Pos;
  NRF_P0->PIN_CNF[1] = GPIO_PIN_CNF_MCUSEL_Peripheral << GPIO_PIN_CNF_MCUSEL_Pos;

  ...
  
  nrf_clock_lf_src_set(NRF_CLOCK, NRF_CLOCK_LFCLK_Xtal);
  nrfx_clock_lfclk_start();
  while (!nrfx_clock_lfclk_is_running());

Unfortunately, this still has problems with the clock startup.

Do you have any insights in how to start the LF clock cleanly?

Regards,

AC

[Sigurd]

Hi,

Is there a known issue with the startup of the LF clock on the nrf5340 app core?

No.

Do you have any insights in how to start the LF clock cleanly?

The Zephyr kernel system clock starts the LF clock for you at PRE_KERNEL_2 level. If you for some reason wants to use internal 32 kHz synthesizer from HFCLK system clock as the LF clock soruce, then set CONFIG_CLOCK_CONTROL_NRF_K32SRC_SYNTH=y in your prj.conf file

[skajam66]

Hi Sigurd,

Thank you for your reply. I'm not using Zephyr - this is a bare metal implementation.

Regards,

AC

[Sigurd]

Hi,

Could you explain more about the issue you are seeing? You are stuck in nrfx_clock_lfclk_is_running() ?

[skajam66]

Hi Sigurd,

> You are stuck in nrfx_clock_lfclk_is_running() ?

Yes, exactly.

Regards,

AC

[Sigurd]

Is there a known issue with the startup of the LF clock on the nrf5340 app core?

No.

skajam66 said:

Yes, exactly.

Try calling this if you are using LFXO.

#define PIN_XL1 0
#define PIN_XL2 1

nrf_gpio_pin_control_select(PIN_XL1, NRF_GPIO_PIN_SEL_PERIPHERAL);
nrf_gpio_pin_control_select(PIN_XL2, NRF_GPIO_PIN_SEL_PERIPHERAL);

1) Are you using external or internal load caps? ref:
https://infocenter.nordicsemi.com/topic/ps_nrf5340/chapters/oscillators/doc/oscillators.html?cp=3_0_0_3_11_1#concept_osc_lfxo
2) Is this a DK or a custom board?

[skajam66]

Hi Sigurd,

Here is my code:

  NRF_P0->PIN_CNF[0] = GPIO_PIN_CNF_MCUSEL_Peripheral << GPIO_PIN_CNF_MCUSEL_Pos;
  NRF_P0->PIN_CNF[1] = GPIO_PIN_CNF_MCUSEL_Peripheral << GPIO_PIN_CNF_MCUSEL_Pos;

  err = nrfx_clock_init(palSysWakeupClockEvent);
  PAL_SYS_ASSERT(err == NRFX_SUCCESS);
  nrfx_clock_enable();

  /* Use 128 MHz clock. */
  //err = nrfx_clock_divider_set(NRF_CLOCK_DOMAIN_HFCLK, NRF_CLOCK_HFCLK_DIV_1);
  //PAL_SYS_ASSERT(err == NRFX_SUCCESS);
  // FIXME: Replace following with nrfx_clock_divider_set()
  NRF_CLOCK->HFCLKCTRL = CLOCK_HFCLKCTRL_HCLK_Div1;
  nrfx_clock_hfclk_start();
  while (!nrfx_clock_hfclk_is_running());

  /* FIXME workaround for LF OSC startup. */
  // Amp modified (AC) - set source to external crystal
//  nrf_clock_lf_src_set(NRF_CLOCK, NRF_CLOCK_LFCLK_Synth);
  nrf_clock_lf_src_set(NRF_CLOCK, NRF_CLOCK_LFCLK_Xtal);
  nrfx_clock_lfclk_start();
  while (!nrfx_clock_lfclk_is_running());

This is a custom board but take note that the vendor uses the PCA10095 as their hardware platform so the notation about the workaround is relating to the PCA10095 board.

As mentioned previously, the code blocks on 

while (!nrfx_clock_lfclk_is_running());

when using either the synth or external source for the LF oscillator.

When using the external crystal as the clock source, it is using external capacitors:

Regards,

AC

[Sigurd]

Hi,

I don't see any issues with the code snippet. 

Maybe you can try to update the nrfx version that you are using.

Also maybe debug, set a breakpoint before/after nrfx_clock_lfclk_start(), and check that the CLOCK registers are as you expect.