SPI Clock edge too slow

Hi,

We are having some issues communicating with a Winbond W25Q64 flash memory. Using the standard SPI Zephyr drivers an attempt to get the Manufacturer ID returns 0xDC rather than the expected oxEF. By analysing things with both a logic analyser and scope we see that the rise time of the SCL clock signal is around 60ns which is almost twice the allowed time according to the Winbond datasheet.

We also repeated the test on the nRF52832 DK and with the scope on SCL we seem the same problem, removing the scope lead improves things a little so the clock is being affected by the scope capacitance. By setting the nRF52832 SCL GPIO to HIHO the problem is fixed and we see a very rapid rise on the SCL

So, the question is....... is it possible to change the SCL GPIO pin drive characteristics on the nRF9160 within the Zephyr SDK?

Any help gratefully received

Thanks

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  • Simon,

    Thanks we will take a look at those flags and use them to set the drive strength 

    Regards 

    Glenn

  • Simon,

    We are using Zephyr 3.1.99 so the new variants apply.

    In our code we have tried doing:

     gpio_pin_configure(g_flash_data.gpio_dev, 20, NRF_GPIO_DRIVE_H0H1);

    which we took from the page you linked to (nordic-nrf-gpio.h)

    Is this correct?

    If so they seem to make absolutely no difference to the drive of GPIO 20

    As we follow this with a

    spi_result = spi_write(spi_dev, spi_cfg_ptr, &tx);

    would the spi_cfg_ptr in that call effectively be reconfiguring the port pins back to their default and effectively ignoring our attempts to change them?

    We did note the GPIO_DS_ALT flags but they are indicated as 'deprecated' when we try to use those.

    Frankly..... it is all a bit confusing!!

    If you have a code example of how to change the pin drive strength that would be VERY useful

    Thanks for your help

    Glenn

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