nrf9160 Power supply problems;

[XT-OWEN]

Hi 

1、Now we connect the VDD to the battery voltage (3.4-4.2), and the VDD_GPIO is fixed at 3.3V. In order to match the GPIO of other peripheral cpus, will all GPIO be connected in 3.3V voltage domain after this connection?

2、VIO is the internal generation of annotations, so does VIO have anything to do with VDD_GPIO?

regard 

owen

[generallysilver]

I think VIO is related to VDD_GPIO. But can't explain it yet?

[ketiljo]

1. It's correct to connect the battery to VDD and VDD_GPIO at 3.3 V (max 3.6 V). The GPIO logic levels will follow VDD_GPIO.

2. VIO is not related to this. This can be used as a power supply to a MIPI controller https://infocenter.nordicsemi.com/topic/nwp_037/WP/nwp_037/mipi_rffe_if.html Just ignore this if it's not being used.