How to erase flash area s0 and s1 when using NSIB?

Hi, 

I am using nrf5340, NCS v2.1.2.

My software arch is s0 + MCUboot + application, and i want to add an upgradable bootloader named MCUboot, of course an upgradable application(appcore + netcore).

I know the mcumgr can do this, but i want application to get the new upgradable packet by BLE or other wireless communications mode, then put them to their upgradable flash area.

After this, the b0 will boot new MCUboot or the MCUboot will boot new application.

--- 

I read some doc about this more than once at nordic NCS doc.

Now i can upgrade the appcore and netcore by MCUboot, and adding an upgradable MCUboot i only need to do.

I try to add B0 in my project, and flash all of them in my nrf5340dk. I see all of them in my board by nrf connect for desktop.

I modify CONFIG_FW_INFO_FIRMWARE_VERSION in mcuboot.conf, and build again. Then i flash 'signed_by_mcuboot_and_b0_s1_image_test_update.hex' using nrfjprog tools.

In my debug tool, i see B0 boot the new MCUboot, and the new MCUboot boot applicaton.

---

At this point, i think i only need to write new MCUboot upgradable packet to flash area s0 or s1 in my application. After reset board, the new MCUboot will booting.

But i can not erase flash area s1 by flash_area_erase() and img_mgmt_impl_erase_slot().

Using flash_area_erase() i got bus falut and img_mgmt_impl_erase_slot() is not erase flash area s1 actually.

[16:39:21.121]收←◆*** Booting Zephyr OS build v3.1.99-ncs1-1  ***
Attempting to boot slot 0.
Attempting to boot from address 0x8200.
Verifying signature against key 0.
Hash: 0x46...0c

[16:39:21.221]收←◆Firmware signature verified.
Firmware version 3
Setting monotonic counter (version: 3, slot: 0)
Booting (0x8200).
[16:39:21.681]收←◆*** Booting Zephyr OS build v3.1.99-ncs1-1  ***

[16:39:26.743]收←◆I: Starting bootloader
W: flash_area: 12, flash_map_entries:17
W: flash_area: 16, flash_map_entries:17
I: Primary image: magic=unset, swap_type=0x1, copy_done=0x3, image_ok=0x3
I: Secondary image: magic=unset, swap_type=0x1, copy_done=0x3, image_ok=0x3
I: Boot source: none
I: Swap type: none
W: flash_area: 7, flash_map_entries:17
W: flash_area: 16, flash_map_entries:17
I: Primary image: magic=unset, swap_type=0x1, copy_done=0x3, image_ok=0x3
I: Secondary image: magic=unset, swap_type=0x1, copy_done=0x3, image_ok=0x3
I: Boot source: none
I: Swap type: none

[16:39:26.969]收←◆I: Bootloader chainload address offset: 0x28000
I: Jumping to the first image slot

[16:39:32.033]收←◆*** Booting Zephyr OS build v3.1.99-ncs1-1  ***
[00:00:00.000,701] <inf> main: Hello World! nrf5340dk_nrf5340_cpuapp.

[16:39:37.035]收←◆[00:00:05.012,023] <wrn> main: align: 0x4
[00:00:05.012,084] <inf> main: read:
                               3d b8 f3 96 00 00 00 00  00 02 00 00 30 a4 00 00 |=....... ....0...
                               00 00 00 00 00 00 00 00  00 00 00 00 00 00 00 00 |........ ........
[00:00:05.012,084] <wrn> main: len: 0xd000.
[00:00:05.012,115] <wrn> main: fa_size: 0xd000.
[00:00:05.012,145] <err> os: ***** BUS FAULT *****
[00:00:05.012,176] <err> os:   Precise data bus error
[00:00:05.012,207] <err> os:   BFAR Address: 0x18000
[00:00:05.012,237] <err> os: r0/a1:  0x00000001  r1/a2:  0x0000d000  r2/a3:  0x00000002
[00:00:05.012,268] <err> os: r3/a4:  0xffffffff r12/ip:  0x0000d000 r14/lr:  0x00033037
[00:00:05.012,298] <err> os:  xpsr:  0x01000000
[00:00:05.012,298] <err> os: Faulting instruction address (r15/pc): 0x0003303a
[00:00:05.012,390] <err> os: >>> ZEPHYR FATAL ERROR 0: CPU exception on CPU 0
[00:00:05.012,451] <err> os: Current thread: 0x20000260 (ota_mod_thread)
[00:00:05.112,121] <err> fatal_error: Resetting system

[16:46:15.623]收←◆*** Booting Zephyr OS build v3.1.99-ncs1-1  ***
Attempting to boot slot 0.
Attempting to boot from address 0x8200.
Verifying signature against key 0.
Hash: 0x46...0c

[16:46:15.722]收←◆Firmware signature verified.
Firmware version 3
Setting monotonic counter (version: 3, slot: 0)
Booting (0x8200).
[16:46:16.197]收←◆*** Booting Zephyr OS build v3.1.99-ncs1-1  ***

[16:46:21.251]收←◆I: Starting bootloader
W: flash_area: 12, flash_map_entries:17
W: flash_area: 16, flash_map_entries:17
I: Primary image: magic=unset, swap_type=0x1, copy_done=0x3, image_ok=0x3
I: Secondary image: magic=unset, swap_type=0x1, copy_done=0x3, image_ok=0x3
I: Boot source: none
I: Swap type: none
W: flash_area: 7, flash_map_entries:17
W: flash_area: 16, flash_map_entries:17
I: Primary image: magic=unset, swap_type=0x1, copy_done=0x3, image_ok=0x3
I: Secondary image: magic=unset, swap_type=0x1, copy_done=0x3, image_ok=0x3
I: Boot source: none
I: Swap type: none

[16:46:21.484]收←◆I: Bootloader chainload address offset: 0x28000
I: Jumping to the first image slot

[16:46:26.595]收←◆*** Booting Zephyr OS build v3.1.99-ncs1-1  ***
[00:00:00.000,701] <inf> mcuboot_util: Swap type: none
[00:00:00.000,762] <inf> mcuboot_util: Swap type: none
[00:00:00.053,466] <inf> main: img_mgmt_impl_erase_slot: 0.
[00:00:00.053,558] <inf> mcuboot_util: Swap type: none
[00:00:00.053,558] <inf> main: 0img_mgmt_slot_in_use: 1.
[00:00:00.053,619] <inf> mcuboot_util: Swap type: none
[00:00:00.053,649] <inf> main: 1img_mgmt_slot_in_use: 0.
[00:00:00.053,680] <inf> mcuboot_util: Swap type: none
[00:00:00.053,771] <inf> mcuboot_util: Swap type: none
[00:00:00.053,802] <inf> main: img_mgmt_state_confirm: 0.
[00:00:00.053,802] <inf> main: Hello World! nrf5340dk_nrf5340_cpuapp.

bus falut:

r14/r15: nrf_nvmc.h:line:306:*(volatile uint32_t *)page_addr = 0xFFFFFFFF;

I hope i can describe the problem clearly.

Thanks for any suggestion.

Regards,

Yang Hu

Parents
  • Hi Yang Hu,

    Just giving you and anyone who come by this thread an update. The combination of "NSIB + MCUboot two-stage bootloading, Network Core (so, nRF5340), and DFU over External Flash" does not work correctly as of NCS 2.2.0.
    The problem also happens with the SMP Server provided in NCS and is not exclusive to your custom solution.

    The erasure of the secondary slot you asked about in here is a result of the underlying problem.

    Our R&D is working on a fix and hopefully it will be available soon. We cannot give a date here on DevZone, however.

    My apologies for the inconvenience.

    Hieu

Reply
  • Hi Yang Hu,

    Just giving you and anyone who come by this thread an update. The combination of "NSIB + MCUboot two-stage bootloading, Network Core (so, nRF5340), and DFU over External Flash" does not work correctly as of NCS 2.2.0.
    The problem also happens with the SMP Server provided in NCS and is not exclusive to your custom solution.

    The erasure of the secondary slot you asked about in here is a result of the underlying problem.

    Our R&D is working on a fix and hopefully it will be available soon. We cannot give a date here on DevZone, however.

    My apologies for the inconvenience.

    Hieu

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