Struggling to flash, boot, and possibly power custom NRF52833-QDAA hardware

[iz9]

Hi there. I've designed a PCB around the NRF52833-QDAA, mostly following the variation 2 sample layout. Upon assembling my board, I was able to flash it exactly one time using an STLink and SWD (to a blank PlatformIO zephyr project). Ever since, I've been unable to get the NRF to show up as a target using either the STLink or a blackmagic probe. I did not connect all VDD Pins together and I failed to connect DC4 and DC6, but manually connecting those with wires hasn't seemed to make a difference in current draw or connection status. My current draw is presently ~420uA when powering the device with 3v3 to the VDD pins. This feels too low to me, as I was expecting around 3mA for active CPU mode. I get approximately the same current draw when providing 5v to VDDH.

I ultimately plan to power this in high voltage mode, which as far as I understand, means I only need to provide a voltage of 2.5-5.5v to the VDDH pin. Is my understanding correct, or is there some necessary configuration in order to use High voltage mode? It was my also my understanding that was automatic.

I've uploaded my KiCad board files to github for possible review. Any feedback or information you may be able to provide me with is much appreciated.

Thanks!

[haakonsh]

Are you able to connect to it with a J-link and nrfjprog? 

[haakonsh]

I've checked your design files and I struggle to understand how the VDD net is powered. It seems that the VDD vias are not connected to a power supply, or anything else for that matter.  

You also need to know that you will break the GPIO spec if you connect any GPIO to a power supply when VDD is unpowered. As a result current will flow through the GPIO's ESD diodes and into the VDD net, thereby powering the device. These ESD diodes are not spec'ed to handle any current at all and will fail in an unpredictable manner, causing a near infinite set of issues. One of which could be the one you're describing. 

[iz9]

The VDD net is simply not powered. As I understand it, one of the modes of operation for this microcontroller is "high voltage mode" where "The system enters High Voltage mode when the supply voltage is only connected to the VDDH pin and the VDD pin is not connected to any voltage supply." (Page 59 of the datasheet v1.3).

I believe my design almost exactly follows the sample layout variation 2, aside from the lack of a connection between DEC4 and DEC6, and the fact that all VDD pins are not externally connected.

haakonsh said:

You also need to know that you will break the GPIO spec if you connect any GPIO to a power supply when VDD is unpowered.

Understood. I did provide power through my 10k pull-ups for I2C initially. I'll ensure those remain unpopulated moving forward.

At present, I only have the sections of schematic labeled "NRF52833 MCU", "Resonator", "RF", and "Power Filtering" populated. In essence, just the components provided by the reference layout and schematic.

[haakonsh]

Only REG1 is powered internally by REG0. That means that the internal 1.3V power rail is powered, but the rest of the device is not. 
I believe pin 8 is connected to the output of REG0 and this VDD pin is used to power the rest of the VDD net externally. 

And yes, this information should have been added to the PCB guidelines or the regulator chapter in the prod spec :/