nrf5340 SPI high drive within nRF Connect SDK

[d_c_h_w]

Hi,

I can see from other posters that high drive can be enabled via calling the nrf_gpio_cfg() function.

But when using the nRF5340 and the nRF Conenct SDK, the configuration of the SPI is mainly done via the '.conf' and '.overlay' configuration rather than coding. 

This leads me to be unsure as to where to call the nrf_gpio_cfg  function to override the default low drive setting.

I can see a few layers down that high drive is enabled automatically if using QSPI or when running at 32MHz, but I am trying to find the neatest way of forcing this for my use case in my application code, and I don't want my change to be overwritten by the spi intiailzation that is triggered by the .overlay file.

In my overlay file I set

&spi4 {
	compatible = "nordic,nrf-spim";
	status = "okay";
	mosi-pin = <9>;
	miso-pin = <10>;
	sck-pin = <8>;
};

And in my application code I have a struct configured

static const struct spi_config spi_cfg = {
    .operation = SPI_WORD_SET(8) | SPI_TRANSFER_MSB,
    .cs=&spi_cs,
    .frequency = 16000000,
    .slave = 0,
};

Which is passed to the  spi_transceive when I want to send or receive data

Are there any pointers you can give me, as to how and where to change the drive mode?

[d_c_h_w]

Ideally I would like to be able to specify in the dts overlay file, but when I try and add extra parameters to this they fail to parse properly (cmake)

e.g trying to add thing like

clock-frequency = <32000000>;

or

sck-frequency = <32000000>;

To this

/* use the high speed spi */
&spi4 {
compatible = "nordic,nrf-spim";
status = "okay";
mosi-pin = <9>;
miso-pin = <10>;
sck-pin = <8>;
};

causes problems, so I presume I am doing it in the wrong way. I have looked atother peoples examples and tried to use this for guidance

https://docs.zephyrproject.org/latest/build/dts/api/bindings/spi/nordic%2Cnrf-spim.html#dtbinding-nordic-nrf-spim

[Håkon Alseth]

Hi,

 

Based on your overlay, it looks like you are using NCS v1.X. Newer v2.x uses pinctrl, where you can specify the drive strength of GPIOs given to bus instances. Here's an example:

https://github.com/nrfconnect/sdk-nrf/blob/v2.3.0/boards/arm/nrf5340_audio_dk_nrf5340/nrf5340_audio_dk_nrf5340_cpuapp_common-pinctrl.dtsi#L75

 

For NCS v1.x, you need to manually set the drive-strength after SPI initialization to get high drive.

 

Kind regards,

Håkon

[d_c_h_w]

ok thanks for your response.

Apologies, I should have mentioned the version of SDK I was using, which is 1.6.1, which was the latest version during the actual development of our application.

Håkon Alseth said:

For NCS v1.x, you need to manually set the drive-strength after SPI initialization to get high drive.

Having done some debugging of the start up procedure, I see that the intiilaization is called only once, so I should be able to manually set the drrive strength of each pin of the spi with the nrf_gpio_cfg function at a point I know the first initializtion has already taken place.