Configuring PIN 0.00 and P0.01 as GPIO

I am trying to use P0.00 and P0.01 as GPIOs on nrf5340 DK board. I have opened SB1 and SB2. Also, soldered SB3 and SB4. I am using blinky example to test the configuration. However, I can not set the logic levels. The Pin 0.00 set to  logic 0.

I have modified prj.conf to enable internal RC oscillator. prj.conf looks as follows

CONFIG_GPIO=y
CONFIG_CLOCK_CONTROL_NRF_K32SRC_RC=y
CONFIG_CLOCK_CONTROL_NRF_K32SRC_500PPM=y
CONFIG_CLOCK_CONTROL_NRF_K32SRC_SYNTH=y

Please find the complete project at GITHUB link: nrf5430_playground/blinky at master · surendranadkarni/nrf5430_playground (github.com)

Would you please help?

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  • Hi,

    There is no other configuration that is needed. As long as you don't enable the 32.768 kHz crystal oscillator, the pins will be normal GPIO pins from the IC perspective. I did not get a change to test now, but can you check the GPIO registers from a debugger to see if the pins are configured as output and set and cleared as you would expect in the IC itself (at least seen from a debugger)?

    PS: Your configuration is wrong, as you are trying to enable both the LFRC and synthesized (from HF clock). So you should remove the line in with CONFIG_CLOCK_CONTROL_NRF_K32SRC_SYNTH=y in you prj.conf. (That should not matter with regard to this issue, though.)

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  • Hi,

    There is no other configuration that is needed. As long as you don't enable the 32.768 kHz crystal oscillator, the pins will be normal GPIO pins from the IC perspective. I did not get a change to test now, but can you check the GPIO registers from a debugger to see if the pins are configured as output and set and cleared as you would expect in the IC itself (at least seen from a debugger)?

    PS: Your configuration is wrong, as you are trying to enable both the LFRC and synthesized (from HF clock). So you should remove the line in with CONFIG_CLOCK_CONTROL_NRF_K32SRC_SYNTH=y in you prj.conf. (That should not matter with regard to this issue, though.)

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