NRF5340 RESET pin voltage thresholds and hysteresis

Question

Hi there! 
 
 Browsed through different documents and resources but did not find anything concrete... 
 I need to understand how much is the RESET pin voltage hysteresis of NRF5340. 
 I read that there is some pull-up as on the other GPIOs but there is no information about at what voltage threshold the RESET pin is deasserted and at what threshold is asserted back . 
 I'm pretty sure there should be some significant hysteresis! 
 Can someone state that? 
 
 BR, 
 Valeri

Kazi Afroza Sultana · Accepted Answer

Hello, 
 A pin reset is generated when the physical reset pin on the device is asserted. The reset pin has an internal pull-up resistor with the same resistance as GPIO pull-ups. 
 
 The physical reset pin is low active , so when applying 0.3VDD or lower (bottom at VSS), RESET pin is asserted. When applying 0.7VDD or higher (up to VDD), RESET pin is de-asserted.

NRF5340 RESET pin voltage thresholds and hysteresis

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