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Behavior when a single PPI channel triggers 2 timer tasks

nRF52832 / SDK 14.2 / SD5.1.0

There might be two configurations to setup a PPI channel to assign some peripheral event to both timer capture & clear task:

nrf_drv_ppi_channel_assign(event, (uint32_t)&NRF_TIMERX->TASKS_CAPTURE[Y]);
nrf_drv_ppi_channel_fork_assign(event, (uint32_t)&NRF_TIMERX->TASKS_CLEAR]);
nrf_drv_ppi_channel_assign(event, (uint32_t)&NRF_TIMERX-> TASKS_CLEAR );
nrf_drv_ppi_channel_fork_assign(event, (uint32_t)&NRF_TIMERX->TASKS_CAPTURE[Y]]);

Q1

Is there any difference between the above two configurations?

Q2

What will be the value of NRF_TIMERX->CC[Y] after the PPI channel is triggered by event?

In PS_v1.4:

22 PPI — Programmable peripheral interconnect Each TEP implements a fork mechanism that enables a second task to be triggered at the same time as the task specified in the TEP is triggered.

24.3 Task delays After the TIMER is started, the CLEAR task, COUNT task and the STOP task will guarantee to take effect within one clock cycle of the PCLK16M.

It looks like the above descriptions indicates that there should be no difference for Q1, is this correct? And since capture task delay is not specified, I have no idea about Q2.

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