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clarification of PAN#73 (v3 TIMER PPI sleep issues) workaround

pabigot

The workaround for nRF51822 PAN#73 specifies setting an undocumented register at offset 0x0C0C of the timer peripheral to 1 prior to TASKS_START, and clearing it after TASKS_STOP.

Two questions:

  • The description says "Routing TASKs...using the PPI and at the same time going into sleep mode". "At the same time" is unclear. Does the anomaly only apply when entering sleep immediately after configuring a PPI, or is it an issue any time the CPU is in sleep mode while the PPI is enabled? (I assume the latter, but the former is a valid interpretation.)

  • What is the impact of the register at that address being set to 1 when the timer is stopped? is shutdown? Increased current consumption? Anything else?

And a request: in future SDKs and documentation please add a register declaration in the NRF_TIMER_Type structure that can be used when implementing the workaround. Direct assignments to undocumented absolute addresses raise red flags in code review (and thus introduce the need for comments that contain links to the PAN description that justifies for their presence).

  • 0

    1. The Anomaly apply only when in sleep mode and if TIMER events are channeled to gpiote or RTC through PPI (not necessarily configured just before the sleep)

    2. If the chip is in normal (or system on) mode then no difference in power consumption. But if in sleep mode and not using Timer events to trigger GPIOTE or RTC tasks, then there will be unnecessary increase in power consumption.

    The registers are undocumented for a good reason. And hence not available in header files. It is always good to explain this in comments giving links to PAN in your code if possible irrespective of if the register is documented or not(or available in header or not)

  • 0

    I measured the current consumption on the PCA10028 development board with a rev 3 chip. When in sleep mode, setting the timer register for the workaround to 1, without enabling the timer or doing anything else with it, increases the current consumption by 290uA.

  • 0 in reply to Paolo D

    My description 2) explains this behavior. The workaround will also force to switch a voltage regulator on , that is why it was required to set this register to zero when not sleeping or not using timer events to trigger GPIOTE or RTC tasks

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