Hello,
I have a custom board with a nRF5340 on it. The firmware gets built with MCUBoot in serial recovery mode to update the application core. The serial recovery mode is necessary for the update to work on this board. Updating the application core works perfectly fine.
As there is the possibility that I have to change something in the netcore firmware, I want to implement an update functionality for it via serial recovery mode as well.
I found this doc as well as this doc, but currently I am unsure as to what is really needed to get this update functionality to work.
I need some guidance as to what Kconfig statements need to go into which prj.conf, be it application firmware prj.conf, the mcuboot prj.conf or the netcore firmware prj.conf.
Another question: if I switch back to the nRF5340DK for testing, does the netcore print strings to a console like the application core?
I use SDK v2.2.0, the application core firmware is based on the central_bas sample project and the netcore firmware is based on the hci_rpmsg sample.
Thanks in advance,
Alex
prj.conf of central_bas:
# # Copyright (c) 2019 Nordic Semiconductor ASA # # SPDX-License-Identifier: LicenseRef-Nordic-5-Clause # CONFIG_NCS_SAMPLES_DEFAULTS=y CONFIG_BT=y CONFIG_BT_DEBUG_LOG=y CONFIG_BT_CENTRAL=y CONFIG_BT_SMP=y CONFIG_BT_GATT_CLIENT=y CONFIG_BT_GATT_DM=y # was before CONFIG_HEAP_MEM_POOL_SIZE=1024, 1.6.1 was CONFIG_HEAP_MEM_POOL_SIZE=2048 CONFIG_HEAP_MEM_POOL_SIZE=2048 #CONFIG_MAIN_STACK_SIZE=4096 CONFIG_BT_BAS_CLIENT=y CONFIG_BT_SCAN=y CONFIG_BT_SCAN_FILTER_ENABLE=y CONFIG_BT_SCAN_UUID_CNT=1 CONFIG_BT_PRIVACY=y CONFIG_BT_SETTINGS=y CONFIG_FLASH=y CONFIG_FLASH_PAGE_LAYOUT=y CONFIG_FLASH_MAP=y CONFIG_NVS=y CONFIG_SETTINGS=y CONFIG_DK_LIBRARY=y # Enable nordic security backend and PSA APIs CONFIG_NRF_SECURITY=y CONFIG_MBEDTLS_PSA_CRYPTO_C=y CONFIG_MBEDTLS_ENABLE_HEAP=y CONFIG_MBEDTLS_HEAP_SIZE=8192 CONFIG_PSA_CRYPTO_DRIVER_OBERON=n CONFIG_PSA_CRYPTO_DRIVER_CC3XX=y # START added from peripheral_UART example # Enable the UART driver CONFIG_UART_ASYNC_API=y CONFIG_NRFX_UARTE0=y CONFIG_NRFX_UARTE1=y CONFIG_SERIAL=y CONFIG_GPIO=y # Make sure printk is not printing to the UART console CONFIG_CONSOLE=y CONFIG_UART_CONSOLE=y # Enable the NUS service CONFIG_BT_NUS=y # END added from peripheral_UART example ### Added for MCUBoot as first-stage bootloader ### CONFIG_BOOTLOADER_MCUBOOT=y CONFIG_MCUBOOT_IMAGE_VERSION="1.0.0+1" # maj.min.rev+build ### Some command handlers require a large stack. Important for mcumgr, would otherwise timeout CONFIG_SYSTEM_WORKQUEUE_STACK_SIZE=4096 ### Start of necessary project config ### CONFIG_CLOCK_CONTROL_NRF_K32SRC_SYNTH=y CONFIG_CLOCK_CONTROL_NRF_K32SRC_500PPM=y CONFIG_SOC_LFXO_CAP_EXTERNAL=y CONFIG_SOC_HFXO_CAP_EXTERNAL=y CONFIG_NRFX_CLOCK_LFXO_TWO_STAGE_ENABLED=n CONFIG_NRFX_CLOCK=y ### End of necessary project config ###
prj.conf of mcuboot:
CONFIG_PM=n CONFIG_MAIN_STACK_SIZE=10240 CONFIG_MBEDTLS_CFG_FILE="mcuboot-mbedtls-cfg.h" CONFIG_BOOT_SWAP_SAVE_ENCTLV=n CONFIG_BOOT_ENCRYPT_RSA=n CONFIG_BOOT_ENCRYPT_EC256=n CONFIG_BOOT_ENCRYPT_X25519=n CONFIG_BOOT_UPGRADE_ONLY=n CONFIG_BOOT_BOOTSTRAP=n ### mbedTLS has its own heap # CONFIG_HEAP_MEM_POOL_SIZE is not set ### We never want Zephyr's copy of tinycrypt. If tinycrypt is needed, ### MCUboot has its own copy in tree. # CONFIG_TINYCRYPT is not set # CONFIG_TINYCRYPT_ECC_DSA is not set # CONFIG_TINYCRYPT_SHA256 is not set CONFIG_FLASH=y CONFIG_FPROTECT=y ### Various Zephyr boards enable features that we don't want. # CONFIG_BT is not set # CONFIG_BT_CTLR is not set # CONFIG_I2C is not set CONFIG_LOG=y CONFIG_LOG_MODE_MINIMAL=y # former CONFIG_MODE_MINIMAL ### Ensure Zephyr logging changes don't use more resources CONFIG_LOG_DEFAULT_LEVEL=0 ### Decrease footprint by ~4 KB in comparison to CBPRINTF_COMPLETE=y CONFIG_CBPRINTF_NANO=y CONFIG_NRF_RTC_TIMER_USER_CHAN_COUNT=0 ### Added for serial recovery ### CONFIG_MCUBOOT_SERIAL=y CONFIG_BOOT_SERIAL_UART=y ### Only CONFIG_UART_CONSOLE=n should be necessary CONFIG_UART_CONSOLE=n #CONFIG_CONSOLE=n #CONFIG_CONSOLE_HANDLER=n ### Enable wait for serial recovery ### CONFIG_BOOT_SERIAL_WAIT_FOR_DFU=y CONFIG_BOOT_SERIAL_WAIT_FOR_DFU_TIMEOUT=5000 ### Start of necessary project config ### CONFIG_CLOCK_CONTROL_NRF_K32SRC_SYNTH=y CONFIG_CLOCK_CONTROL_NRF_K32SRC_500PPM=y CONFIG_SOC_LFXO_CAP_EXTERNAL=y CONFIG_SOC_HFXO_CAP_EXTERNAL=y CONFIG_NRFX_CLOCK_LFXO_TWO_STAGE_ENABLED=n CONFIG_NRFX_CLOCK=y ### End of necessary project config ###
prj.conf of hci_rpmsg:
CONFIG_IPC_SERVICE=y CONFIG_MBOX=y CONFIG_HEAP_MEM_POOL_SIZE=8192 CONFIG_MAIN_STACK_SIZE=512 CONFIG_SYSTEM_WORKQUEUE_STACK_SIZE=512 CONFIG_BT=y CONFIG_BT_HCI_RAW=y CONFIG_BT_HCI_RAW_RESERVE=1 CONFIG_BT_MAX_CONN=16 CONFIG_BT_CTLR_ASSERT_HANDLER=y # Workaround: Unable to allocate command buffer when using K_NO_WAIT since # Host number of completed commands does not follow normal flow control. CONFIG_BT_BUF_CMD_TX_COUNT=10 ### Start of necessary project config ### CONFIG_CLOCK_CONTROL_NRF_K32SRC_SYNTH=y CONFIG_CLOCK_CONTROL_NRF_K32SRC_500PPM=y CONFIG_NRFX_CLOCK=n ### End of necessary project config ###
In case it is needed, nrf5340dk_nrf5340_cpuapp.overlay:
// To get started, press Ctrl+Space to bring up the completion menu and view the available nodes.
// You can also use the buttons in the sidebar to perform actions on nodes.
// Actions currently available include:
// * Enabling / disabling the node
// * Adding the bus to a bus
// * Removing the node
// * Connecting ADC channels
// For more help, browse the DeviceTree documentation at https://docs.zephyrproject.org/latest/guides/dts/index.html
// You can also visit the nRF DeviceTree extension documentation at https://nrfconnect.github.io/vscode-nrf-connect/devicetree/nrfdevicetree.html
// This information was auto-generated when this file was created in VS Code
/ {
chosen {
nordic,nus-uart = &uart1;
};
};
&uart0 {
status = "okay";
current-speed = <115200>;
pinctrl-0 = <&uart0_default_overlay>;
pinctrl-1 = <&uart0_sleep_overlay>;
pinctrl-names = "default", "sleep";
};
&uart1 {
status = "okay";
current-speed = <115200>;
pinctrl-0 = <&uart1_default_overlay>;
pinctrl-1 = <&uart1_sleep_overlay>;
pinctrl-names = "default", "sleep";
};
// TODO: add missing pin configuration
// sda-pin = < 0x16 >;
// scl-pin = < 0x17 >;
&i2c1 {
status = "disabled";
};
// unsure
&pwm0 {
status = "okay";
pinctrl-0 = <&pwm0_default_overlay>;
pinctrl-1 = <&pwm0_sleep_overlay>;
pinctrl-names = "default", "sleep";
};
// TODO: add missing pin configuration
// io-pins = < 0xf >;
&qspi {
status = "disabled";
};
&pinctrl {
uart0_default_overlay: uart0_default_overlay {
group1 {
psels = <NRF_PSEL(UART_TX, 0, 28)>,
<NRF_PSEL(UART_RTS, 0, 30)>;
};
group2 {
psels = <NRF_PSEL(UART_RX, 0, 26)>,
<NRF_PSEL(UART_CTS, 0, 31)>;
bias-pull-up;
};
};
uart0_sleep_overlay: uart0_sleep_overlay {
group1 {
psels = <NRF_PSEL(UART_TX, 0, 28)>,
<NRF_PSEL(UART_RX, 0, 26)>,
<NRF_PSEL(UART_RTS, 0, 30)>,
<NRF_PSEL(UART_CTS, 0, 31)>;
low-power-enable;
};
};
uart1_default_overlay: uart1_default_overlay {
group1 {
psels = <NRF_PSEL(UART_TX, 1, 2)>;
};
group2 {
psels = <NRF_PSEL(UART_RX, 0, 13)>;
bias-pull-up;
};
};
uart1_sleep_overlay: uart1_sleep_overlay {
group1 {
psels = <NRF_PSEL(UART_TX, 1, 2)>,
<NRF_PSEL(UART_RX, 0, 13)>;
low-power-enable;
};
};
/* unsure begin */
pwm0_default_overlay: pwm0_default_overlay {
group1 {
psels = <NRF_PSEL(PWM_OUT0, 0, 16)>;
};
};
pwm0_sleep_overlay: pwm0_sleep_overlay {
group1 {
psels = <NRF_PSEL(PWM_OUT0, 0, 16)>;
low-power-enable;
};
};
/* unsure end */
};
&{/} {
leds {
compatible = "gpio-leds";
led0: led_0 {
gpios = < &gpio0 0x13 0x1 >;
label = "Green LED 0";
};
led1: led_1 {
gpios = < &gpio0 0x15 0x1 >;
label = "Green LED 1";
};
led2: led_2 {
gpios = < &gpio1 0x08 0x1 >;
label = "Green LED 2";
};
led3: led_3 {
gpios = < &gpio1 0x06 0x1 >;
label = "Green LED 3";
};
led4: led_4 {
gpios = < &gpio1 0x04 0x1 >;
label = "Green LED 4";
};
};
aliases {
led0 = &led0;
led1 = &led1;
led2 = &led2;
led3 = &led3;
led4 = &led4;
pwm-led0 = &pwm_led0;
sw0 = &button0;
sw1 = &button1;
sw2 = &button2;
sw3 = &button3;
bootloader-led0 = &led0;
};
};
dts.overlay (mcuboot):
/ {
chosen {
zephyr,code-partition = &boot_partition;
};
};
&uart0 {
status = "okay";
current-speed = <115200>;
pinctrl-0 = <&uart0_default_overlay>;
pinctrl-1 = <&uart0_sleep_overlay>;
pinctrl-names = "default", "sleep";
};
&uart1 {
status = "okay";
current-speed = <115200>;
pinctrl-0 = <&uart1_default_overlay>;
pinctrl-1 = <&uart1_sleep_overlay>;
pinctrl-names = "default", "sleep";
};
// TODO: add missing pin configuration
&i2c1 {
status = "disabled";
};
// unsure
&pwm0 {
status = "okay";
pinctrl-0 = <&pwm0_default_overlay>;
pinctrl-1 = <&pwm0_sleep_overlay>;
pinctrl-names = "default", "sleep";
};
// TODO: add missing pin configuration
&qspi {
status = "disabled";
};
&pinctrl {
uart0_default_overlay: uart0_default_overlay {
group1 {
psels = <NRF_PSEL(UART_TX, 0, 28)>,
<NRF_PSEL(UART_RTS, 0, 30)>;
};
group2 {
psels = <NRF_PSEL(UART_RX, 0, 26)>,
<NRF_PSEL(UART_CTS, 0, 31)>;
bias-pull-up;
};
};
uart0_sleep_overlay: uart0_sleep_overlay {
group1 {
psels = <NRF_PSEL(UART_TX, 0, 28)>,
<NRF_PSEL(UART_RX, 0, 26)>,
<NRF_PSEL(UART_RTS, 0, 30)>,
<NRF_PSEL(UART_CTS, 0, 31)>;
low-power-enable;
};
};
uart1_default_overlay: uart1_default_overlay {
group1 {
psels = <NRF_PSEL(UART_TX, 1, 2)>;
};
group2 {
psels = <NRF_PSEL(UART_RX, 0, 13)>;
bias-pull-up;
};
};
uart1_sleep_overlay: uart1_sleep_overlay {
group1 {
psels = <NRF_PSEL(UART_TX, 1, 2)>,
<NRF_PSEL(UART_RX, 0, 13)>;
low-power-enable;
};
};
/* unsure begin */
pwm0_default_overlay: pwm0_default_overlay {
group1 {
psels = <NRF_PSEL(PWM_OUT0, 0, 16)>;
};
};
pwm0_sleep_overlay: pwm0_sleep_overlay {
group1 {
psels = <NRF_PSEL(PWM_OUT0, 0, 16)>;
low-power-enable;
};
};
/* unsure end */
};
&{/} {
leds {
compatible = "gpio-leds";
led0: led_0 {
gpios = < &gpio0 0x13 0x1 >;
label = "Green LED 0";
};
led1: led_1 {
gpios = < &gpio0 0x15 0x1 >;
label = "Green LED 1";
};
led2: led_2 {
gpios = < &gpio1 0x08 0x1 >;
label = "Green LED 2";
};
led3: led_3 {
gpios = < &gpio1 0x06 0x1 >;
label = "Green LED 3";
};
led4: led_4 {
gpios = < &gpio1 0x04 0x1 >;
label = "Green LED 4";
};
};
aliases {
led0 = &led0;
led1 = &led1;
led2 = &led2;
led3 = &led3;
led4 = &led4;
pwm-led0 = &pwm_led0;
sw0 = &button0;
sw1 = &button1;
sw2 = &button2;
sw3 = &button3;
bootloader-led0 = &led0;
};
};
image list with mcumgr:
Y:\>mcumgr -c nrf53 image list
Images:
image=0 slot=0
version: 1.0.1.1
bootable: false
flags:
hash: Unavailable
Split status: N/A (0)
