Implement bootloader in NCS SDK

[QuentinD]

Hello,

Until now I was working on an application based on the nRF5 SDK: it is this application that is used by my customers.
Now I would like to use the NCS SDK to continue to have the latest features and bug fixes.

Here I almost finished redeveloping my new application (based on NCS SDK) to work like my old one (based on nRF5 SDK) but I have a problem with the bootloader...

My board (contains an nrf 52840) has no buttons and no external memory (so I will have to overwrite existing code when I do an update) but does have a UART.
I need to be able to update the application but also the bootloader.

Here are my questions:

• I think I have to go into recovery mode to be able to update in this situation? But how can I do it if I don't have a button?
• The update files will be sent by another microcontroller on the board via the uart: can you tell me more about what I need so that the other microcontroller can communicate with the nrf 52840 to send the files to the bootloader? (files ? protocol ?)
• Is it possible to update a device that would work with the nRF5 SDK (secure_bootloader_uart_mbr_pca10056) to keep the old bootloader but updating the softdevice+app with the new application (NCS SDK)?

THANKS

[AHaug]

Hi,

I think I have to go into recovery mode to be able to update in this situation? But how can I do it if I don't have a button?

One option is to use "serial recovery with wait", 

A colleague of mine has written this repository with samples, where you the serial recovery samples containing samples for serial recovery using both the waiting and mcumgr method and regular UART serial recovery. I suggest you have a look at these samples to see if they fit your project or if you're able to tailor them to your project

The update files will be sent by another microcontroller on the board via the uart: can you tell me more about what I need so that the other microcontroller can communicate with the nrf 52840 to send the files to the bootloader? (files ? protocol ?)

I recommend you to have a look at devzone.nordicsemi.com/.../doing-an-fota-via-ble-using-a-nordic-development-kit

Is it possible to update a device that would work with the nRF5 SDK (secure_bootloader_uart_mbr_pca10056) to keep the old bootloader but updating the softdevice+app with the new application (NCS SDK)?

Yes, but there are things you will have to take in mind. I recommend you to have a look at  One bootloader to rule them all which refers to a sample created by a colleague of mine showing how to port a nRF5 app to become a NCS app  Hang with nRF5 SDK 17.1.0 Bootloader and nRF Connect SDK 2.1.0 application . This case, https://devzone.nordicsemi.com/f/nordic-q-a/100639/nrf5340-multi-image-dfu-update-over-ble-remote-error-in-value-3 does also to some extent explain some of the procedure

Let me know if this is enough to get you started! 

Kind regards,
Andreas

[QuentinD]

Hello,

Thank you very much for your answer.

I've been working on this for 2 weeks but unfortunately I still have problems...

Here at the moment, I'm trying to find a way to update the devices that are with my customers (with the nRF5 SDK) so that it's not too complicated for us and for them to manage the updates of old devices and new ones (with NCS SDK). I think the simplest solution would be to manage to only update the app of the devices that are with my customers (therefore keeping the old bootloader and the softdevice present in the devices).

To do this, I tried to do like Vidar Berg with his project 2273.peripheral_lbs.zip (devzone.nordicsemi.com/.../hang-with-nrf5-sdk-17- 1-0-bootloader-and-nrf-connect-sdk-2-1-0-application) but unfortunately there must be things I forgot because it doesn't work.

When I compile my project and flash it, it works on my device. On the other hand, if I send the update to a device working with the nRF5 SDK, it accepts the update but afterwards it is blocked.

Here are the problems I'm seeing that I don't know how to fix:

- In the prj.conf file of my project, I put "CONFIG_FLASH_LOAD_OFFSET=0x27000" but it is the value 0xC000 which is put (I have a warning for that in the logs).

- In my mcuboot.cong file in the child_image folder, I added "CONFIG_SINGLE_APPLICATION_SLOT=y". Despite this, I have to provide memory in my pm_static.yml file for mcuboot_secondary otherwise I get a compilation error: do you know why?

Here are my DFU logs:

3312.test.log

Here is my \Application\boards\pm_static_nrf52840dk_nrf52840.yml:

app:
  address: 0x10200
  region: flash_primary
  size: 0xdfe00
mcuboot:
  address: 0x0
  region: flash_primary
  size: 0x10000
mcuboot_pad:
  address: 0x10000
  end_address: 0x1200
  placement:
    before:
    - mcuboot_primary_app
  region: flash_primary
  size: 0x200
mcuboot_primary:
  address: 0x10000
  orig_span: &id001
  - mcuboot_pad
  - app
  region: flash_primary
  size: 0xD0000
  span: *id001
mcuboot_primary_app:
  address: 0x10200
  orig_span: &id002
  - app
  region: flash_primary
  size: 0xcfe00
  span: *id002
mcuboot_secondary:
  address: 0xE0000
  end_address: 0xF0000
  placement:
    after:
    - mcuboot_primary
    align:
      start: 0x1000
  region: flash_primary
  share_size:
  - mcuboot_primary
  size: 0x10000
settings_storage:
  address: 0xf0000
  end_address: 0x100000
  region: flash_primary
  size: 0x10000
sram_primary:
  address: 0x20000000
  end_address: 0x20040000
  region: sram_primary
  size: 0x40000

Here is my \Application\child_image\mcuboot.conf:

CONFIG_UART_CONSOLE=n
CONFIG_MCUBOOT_SERIAL=y
CONFIG_BOOT_SERIAL_UART=y

CONFIG_FPROTECT=n #The flash protection mechanism in MCUboot assumes that the mcuboot_primary slot is always placed after the mcuboot partition. It disabled flash protection to get around this limitation.

#CONFIG_PM_PARTITION_SIZE_MCUBOOT=0x18000
CONFIG_PARTITION_MANAGER_ENABLED=y

# The build won't fit on the partition allocated for it without size
# optimizations.
CONFIG_SIZE_OPTIMIZATIONS=y

# Serial
CONFIG_SERIAL=y
CONFIG_UART_CONSOLE=n
CONFIG_UART_LINE_CTRL=y

# MCUBoot serial
#CONFIG_MCUBOOT_SERIAL=y
#CONFIG_BOOT_SERIAL_UART=y

# Config logger
CONFIG_LOG=y
CONFIG_RTT_CONSOLE=y
CONFIG_USE_SEGGER_RTT=y
CONFIG_LOG_BACKEND_UART=n
CONFIG_LOG_BACKEND_RTT=y

#-------------------------------------------------------------

# Declare for single slot and partition size for MCUBoot
CONFIG_PM_PARTITION_SIZE_MCUBOOT=0x10000
CONFIG_SINGLE_APPLICATION_SLOT=y

CONFIG_BOOT_SIGNATURE_KEY_FILE="mcuboot/key/mcuboot_private.pem"  # add a signature key file to this bootloader. This option only accepts the private key of an ECDSA key pair, as build system scripts automatically extract the public key at build time. The file path is relatively to the application directory.
CONFIG_BOOT_SIGNATURE_TYPE_ECDSA_P256=y

Here is my \Application\boards\nrf25840dk_nrf52840.overlay:

/* Copyright (c) 2020 Nordic Semiconductor ASA
 *
 * SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
 */

/ {
	/*
	* In some default configurations within the nRF Connect SDK,
	* e.g. on nRF52840, the chosen zephyr,entropy node is &cryptocell.
	* This devicetree overlay ensures that default is overridden wherever it
	* is set, as this application uses the RNG node for entropy exclusively.
	*/
	chosen {
		zephyr,entropy = &rng;
	};
};
&adc {
	status = "disabled";
};
&uart1 {
	status = "disabled";
};
&pwm0 {
	status = "disabled";
};
&i2c0 {
	status = "disabled";
};
&spi0 {
	status = "disabled";
};
&spi1 {
	status = "disabled";
};
&spi2 {
	status = "disabled";
};
&spi3 {
	status = "disabled";
};
&qspi {
	status = "disabled";
};
&usbd {
	status = "disabled";
};

&uart0_default {
	group1 {
		psels = <NRF_PSEL(UART_TX, 1, 1)>, <NRF_PSEL(UART_RTS, 0, 5)>;
	};
};

&uart0_default {
	group2 {
		psels = <NRF_PSEL(UART_RX, 1, 2)>, <NRF_PSEL(UART_CTS, 0, 7)>;
	};
};

&uart0_default {
	group1 {
		psels = <NRF_PSEL(UART_TX, 1, 1)>, <NRF_PSEL(UART_RTS, 0, 5)>;
	};
};

&uart0_default {
	group2 {
		psels = <NRF_PSEL(UART_RX, 1, 2)>, <NRF_PSEL(UART_CTS, 0, 7)>;
	};
};

&uart0_default {
	group1 {
		psels = <NRF_PSEL(UART_TX, 1, 2)>, <NRF_PSEL(UART_RTS, 0, 5)>;
	};
};

&uart0_default {
	group2 {
		psels = <NRF_PSEL(UART_RX, 1, 1)>, <NRF_PSEL(UART_CTS, 0, 7)>;
	};
};

&uart0_default {
	group2 {
		psels = <NRF_PSEL(UART_RX, 1, 2)>, <NRF_PSEL(UART_CTS, 0, 7)>;
	};
};

&uart0_default {
	group1 {
		psels = <NRF_PSEL(UART_TX, 1, 1)>, <NRF_PSEL(UART_RTS, 0, 5)>;
	};
};

&uart0_default {
	group1 {
		psels = <NRF_PSEL(UART_TX, 1, 2)>, <NRF_PSEL(UART_RTS, 0, 5)>;
	};
};

&uart0_default {
	group2 {
		psels = <NRF_PSEL(UART_RX, 1, 1)>, <NRF_PSEL(UART_CTS, 0, 7)>;
	};
};

&arduino_adc {
    io-channel-map = <0 &adc 1>, <1 &adc 2>, <2 &adc 4>, <3 &adc 5>, <4 &adc 6>, <5 &adc 7>;
};



/delete-node/ &scratch_partition;
/delete-node/ &storage_partition;


// Place storage partition below nRF5 Bootloader. The bootloader starts at 0xf8000 in this case.
&flash0 {
    partitions {
        storage_partition: partition@f5000 {
            label = "storage";
            reg = < 0xf5000 0x3000 >;
        };
    };
};

Here is my prj.conf of my Application:

#
# Copyright (c) 2020 Nordic Semiconductor
#
# SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
#

# nRF board library
CONFIG_DK_LIBRARY=y

CONFIG_MBEDTLS_SHA1_C=n
CONFIG_FPU=y # Allow to process float (double) numbers
CONFIG_ASSERT=y

# Enable the UART driver
CONFIG_UART_INTERRUPT_DRIVEN=y #UART in interrupt mode
CONFIG_SERIAL=y

# Enable ring buffer
CONFIG_RING_BUFFER=y

# Add Bootlaoder to the application
# CONFIG_SECURE_BOOT=y
CONFIG_BOOTLOADER_MCUBOOT=y # add MCUboot as upgradable bootloader 

CONFIG_IMG_MANAGER=y
CONFIG_MCUBOOT_IMG_MANAGER=y
CONFIG_IMG_ERASE_PROGRESSIVELY=y

CONFIG_SIZE_OPTIMIZATIONS=y
CONFIG_FLASH_LOAD_OFFSET=0x27000

# After you upload a new image and reset the development kit, MCUboot attempts to boot the secondary image. If this image has, in order of precedence, a major, minor, or revision value that is lower than the primary application image, it is considered invalid and the existing primary application boots instead.
# The optional label or build number specified after the + character is ignored when evaluating the version. An existing application image with version 0.1.2+3 can be overwritten by an uploaded image with 0.1.2+2, but not by one with 0.1.1+2.
CONFIG_MCUBOOT_IMAGE_VERSION="0.1.0+0"

And finaly, here are my partitions:

app:
  address: 0x10200
  region: flash_primary
  size: 0xdfe00
mcuboot:
  address: 0x0
  region: flash_primary
  size: 0x10000
mcuboot_pad:
  address: 0x10000
  end_address: 0x1200
  placement:
    before:
    - mcuboot_primary_app
  region: flash_primary
  size: 0x200
mcuboot_primary:
  address: 0x10000
  orig_span: &id001
  - mcuboot_pad
  - app
  region: flash_primary
  size: 0xD0000
  span: *id001
mcuboot_primary_app:
  address: 0x10200
  orig_span: &id002
  - app
  region: flash_primary
  size: 0xcfe00
  span: *id002
mcuboot_secondary:
  address: 0xE0000
  end_address: 0xF0000
  placement:
    after:
    - mcuboot_primary
    align:
      start: 0x1000
  region: flash_primary
  share_size:
  - mcuboot_primary
  size: 0x10000
settings_storage:
  address: 0xf0000
  end_address: 0x100000
  region: flash_primary
  size: 0x10000
sram_primary:
  address: 0x20000000
  end_address: 0x20040000
  region: sram_primary
  size: 0x40000

Here I only put the MCUboot to simplify but then I would like to add the CONFIG_SECURE_BOOT.

Thanks for your help !

[AHaug]

Hi,

The following should work:

       nrf_power_gpregret_set(NRF_POWER, 0xB1);
       NVIC_SystemReset();

Kind regards,
Andreas

[QuentinD]

Thanks for your answer but how can I call this function in the NCS SDK?

[AHaug]

Hi,

The lines I gave you was how to use it in NCS.

To test it you can for instance add this code to a basic hello world and see that GPREGRET changes. When you want to use it in your project, change gpregret_set to use the magic 0xB1 instead of increment it.

Open a new hello_world in vs code and modify it to include the following lines and see that gpregret changes value.

#include <hal/nrf_power.h>

        uint8_t val = nrf_power_gpregret_get(NRF_POWER);

        printk("Old GPREGRET val: %u\n", val);

        nrf_power_gpregret_set(NRF_POWER, ++val);

        k_sleep(K_MSEC(1000));

        NVIC_SystemReset();

 

Kind regards,
Andreas

[QuentinD]

Thank you

Currently I only have the MCUboot + app but I would also like to add the NSIB in addition.

Here is the problem I have: if I load the .hex of the complete project, there is no problem (it boots into the application and it works). Now if I try to update the bootlaoder I notice that it writes the file instead of the application and not in s1... Do you have any idea why?

There is a small peculiarity to my project: I defined CONFIG_SINGLE_APPLICATION_SLOT=y so as not to have to double the memory of my application (works very well if I only have the MCUboot).

My chil_image/mcuboot.conf:

#-------------------------------------------- MCUBoot--------------------------------------------
# Bootloader version (To make s1_image bootable with nRF Secure Immutable Bootloader, the value of CONFIG_FW_INFO_FIRMWARE_VERSION for s1_image must be bigger than the one for original image):
CONFIG_FW_INFO_FIRMWARE_VERSION=1

# Declare for single slot and partition size for MCUBoot
CONFIG_PM_PARTITION_SIZE_MCUBOOT=0x10000
CONFIG_SINGLE_APPLICATION_SLOT=y
CONFIG_UPDATEABLE_IMAGE_NUMBER=1

# Signature:
CONFIG_BOOT_SIGNATURE_KEY_FILE="C:/DocTA/Soft/TA-Smart-BT840P/Application/child_image/mcuboot/key/mcuboot_private.pem"#"mcuboot/key/mcuboot_private.pem"  # add a signature key file to this bootloader. This option only accepts the private key of an ECDSA key pair, as build system scripts automatically extract the public key at build time. The file path is relatively to the application directory.
CONFIG_BOOT_SIGNATURE_TYPE_ECDSA_P256=y

# The build won't fit on the partition allocated for it without size optimizations.
CONFIG_SIZE_OPTIMIZATIONS=y
CONFIG_MULTITHREADING=y 

# Logs
CONFIG_LOG=y
CONFIG_RTT_CONSOLE=y
CONFIG_USE_SEGGER_RTT=y
CONFIG_LOG_BACKEND_UART=n
CONFIG_LOG_MODE_DEFERRED=y
CONFIG_LOG_BACKEND_RTT=y
CONFIG_LOG_PRINTK=y
CONFIG_LOG_BUFFER_SIZE=16384
CONFIG_LOG_MODE_OVERFLOW=y


#---------------------------------------- Serial Recovery ----------------------------------------
# Enable MCUboot Serial Recovery
CONFIG_MCUBOOT_SERIAL=y
CONFIG_UART_CONSOLE=n

CONFIG_MCUBOOT_INDICATION_LED=y

# Enable wait for DFU functionality (If any mcumgr commands are run before these 5 seconds have passed, the device will enter Serial Recovery Mode) 
CONFIG_BOOT_SERIAL_WAIT_FOR_DFU=y
CONFIG_BOOT_SERIAL_WAIT_FOR_DFU_TIMEOUT=5000

My prj.conf:

#------------------------- NSIB (nRF Secure Immutable Bootloader) ------------------------- 
CONFIG_SECURE_BOOT=y # add the immutable bootloader
CONFIG_SB_SIGNING_KEY_FILE="C:/DocTA/Soft/TA-Smart-BT840P/Application/child_image/mcuboot/key/mcuboot_private.pem"
CONFIG_BUILD_S1_VARIANT=y
CONFIG_SB_NUM_VER_COUNTER_SLOTS=120
CONFIG_FW_INFO=y # add additional logs --> prj_minimal.conf allow to desactivate

# ---------------------------------------- MCUboot ---------------------------------------- 
CONFIG_BOOTLOADER_MCUBOOT=y # add MCUboot as upgradable bootloader
CONFIG_IMG_MANAGER=y
CONFIG_MCUBOOT_IMG_MANAGER=y
CONFIG_IMG_ERASE_PROGRESSIVELY=y

My partitions:

Mon fichier pm_static.yml:

b0_container: 0x0 -> 0x9000 (0x9000)
	b0: 0x0 -> 0x8000 (0x8000)
	provision: 0x8000 -> 0x9000 (0x1000)

s0: 0x9000 -> 0x19200 (0x10200)
	s0_pad: 0x9000 -> 0x9200 (0x200)
	s0_image: 0x9200 -> 0x19200 (0x10000)
		mcuboot: 0x9200 -> 0x19200 (0x10000)

EMPTY_0: 0x19200 -> 0x1a000 (0xe00)

s1: 0x1a000 -> 0x2a200 (0x10200)
	s1_pad: 0x1a000 -> 0x1a200 (0x200)
	s1_image: 0x1a200 - 0x2a200 (0x10000)

EMPTY_1: 0x2a200 -> 0x2b000 (0xe00)

mcuboot_primary: 0x2b000 -> 0xe0000 (0xB5000)
	mcuboot_pad: 0x2b000 -> 0x2b200 (0x200)
	mcuboot_primary_app: 0x2b200 -> 0xe0000 (0xb4e00)
		app_image: 0x2b200 -> 0xe0000 (0xb4e00)
			app: 0x2b200 -> 0xe0000 (0xb4e00)

mcuboot_secondary: 0xe0000 -> 0xf0000 (0x10000)

settings_storage: 0xf0000 -> 0x100000 (0x10000)

sram_primary: 0x20000000 -> 0x20040000 (0x40000)

Here it's what I did to update the bootloader:
1. Reboot device (button on the PCA10056)

2. Send the cmd: mcumgr -c my_config image upload Application\TA_Smart\zephyr\signed_by_mcuboot_and_b0_s1_image_update.bin

-> file of  54.27 KB

Here are the MCUboot logs:

SEGGER J-Link V7.80c - Real time terminal output
J-Link OB-SAM3U128-V2-NordicSemi compiled Sep 21 2022 09:57:39 V1.0, SN=683294247
Process: JLink.exe
[01:51:45.227,630] <inf> mcuboot: Erasing range 0x%jx:0x%jx
[01:51:45.312,072] <inf> mcuboot: Writing at 0x0 until 0x128
[01:51:45.315,246] <inf> mcuboot: RX: 0x0
[01:51:45.318,603] <inf> mcuboot: TX
[01:51:45.464,691] <inf> mcuboot: RX: 0x0
[01:51:45.468,048] <inf> mcuboot: TX
[01:51:45.605,621] <inf> mcuboot: RX: 0x0
[01:51:45.608,978] <inf> mcuboot: TX
[01:51:45.749,725] <inf> mcuboot: Writing at 0x128 until 0x27c
[01:51:45.753,387] <inf> mcuboot: RX: 0x0
[01:51:45.756,713] <inf> mcuboot: TX
[01:51:45.907,165] <inf> mcuboot: Writing at 0x27c until 0x3d0
[01:51:45.910,827] <inf> mcuboot: RX: 0x0
[01:51:45.914,154] <inf> mcuboot: TX
[01:51:46.049,072] <inf> mcuboot: Writing at 0x3d0 until 0x524
[01:51:46.052,734] <inf> mcuboot: RX: 0x0
[01:51:46.056,060] <inf> mcuboot: TX
[01:51:46.191,192] <inf> mcuboot: Writing at 0x524 until 0x678
[01:51:46.194,824] <inf> mcuboot: RX: 0x0
[01:51:46.198,181] <inf> mcuboot: TX
[01:51:46.332,183] <inf> mcuboot: Writing at 0x678 until 0x7cc
[01:51:46.335,845] <inf> mcuboot: RX: 0x0
[01:51:46.339,569] <inf> mcuboot: TX
[01:51:46.491,149] <inf> mcuboot: Writing at 0x7cc until 0x920
[01:51:46.494,812] <inf> mcuboot: RX: 0x0
[01:51:46.498,168] <inf> mcuboot: TX
[01:51:46.633,575] <inf> mcuboot: Writing at 0x920 until 0xa74
[01:51:46.637,207] <inf> mcuboot: RX: 0x0
[01:51:46.640,563] <inf> mcuboot: TX
[01:51:46.773,986] <inf> mcuboot: Writing at 0xa74 until 0xbc8
[01:51:46.777,648] <inf> mcuboot: RX: 0x0
[01:51:46.780,975] <inf> mcuboot: TX
[01:51:46.915,374] <inf> mcuboot: Writing at 0xbc8 until 0xd1c
[01:51:46.919,006] <inf> mcuboot: RX: 0x0
[01:51:46.922,363] <inf> mcuboot: TX
[01:51:47.072,998] <inf> mcuboot: Writing at 0xd1c until 0xe70
[01:51:47.076,660] <inf> mcuboot: RX: 0x0
[01:51:47.080,017] <inf> mcuboot: TX
[01:51:47.215,362] <inf> mcuboot: Writing at 0xe70 until 0xfc4
[01:51:47.219,024] <inf> mcuboot: RX: 0x0
[01:51:47.222,351] <inf> mcuboot: TX
[01:51:47.357,604] <inf> mcuboot: Erasing range 0x%jx:0x%jx
[01:51:47.442,047] <inf> mcuboot: Writing at 0xfc4 until 0x1118
[01:51:47.445,709] <inf> mcuboot: RX: 0x0
[01:51:47.449,066] <inf> mcuboot: TX
[01:51:47.583,587] <inf> mcuboot: Writing at 0x1118 until 0x126c
[01:51:47.587,249] <inf> mcuboot: RX: 0x0
[01:51:47.590,576] <inf> mcuboot: TX
[01:51:47.725,646] <inf> mcuboot: Writing at 0x126c until 0x13c0
[01:51:47.729,309] <inf> mcuboot: RX: 0x0
[01:51:47.732,635] <inf> mcuboot: TX
[01:51:47.868,011] <inf> mcuboot: Writing at 0x13c0 until 0x1514
[01:51:47.871,673] <inf> mcuboot: RX: 0x0
[01:51:47.875,000] <inf> mcuboot: TX
[01:51:48.024,780] <inf> mcuboot: Writing at 0x1514 until 0x1668
[01:51:48.028,411] <inf> mcuboot: RX: 0x0
[01:51:48.031,768] <inf> mcuboot: TX
[01:51:48.165,100] <inf> mcuboot: Writing at 0x1668 until 0x17bc
[01:51:48.169,189] <inf> mcuboot: RX: 0x0
[01:51:48.172,546] <inf> mcuboot: TX
[01:51:48.306,396] <inf> mcuboot: Writing at 0x17bc until 0x1910
[01:51:48.310,058] <inf> mcuboot: RX: 0x0
[01:51:48.313,385] <inf> mcuboot: TX
[01:51:48.465,148] <inf> mcuboot: Writing at 0x1910 until 0x1a64
[01:51:48.468,811] <inf> mcuboot: RX: 0x0
[01:51:48.472,595] <inf> mcuboot: TX
[01:51:48.606,628] <inf> mcuboot: Writing at 0x1a64 until 0x1bb8
[01:51:48.610,290] <inf> mcuboot: RX: 0x0
[01:51:48.613,616] <inf> mcuboot: TX
[01:51:48.748,046] <inf> mcuboot: Writing at 0x1bb8 until 0x1d0c
[01:51:48.751,708] <inf> mcuboot: RX: 0x0
[01:51:48.755,035] <inf> mcuboot: TX
[01:51:48.890,930] <inf> mcuboot: Writing at 0x1d0c until 0x1e60
[01:51:48.895,019] <inf> mcuboot: RX: 0x0
[01:51:48.898,345] <inf> mcuboot: TX
[01:51:49.032,928] <inf> mcuboot: Writing at 0x1e60 until 0x1fb4
[01:51:49.036,590] <inf> mcuboot: RX: 0x0
[01:51:49.039,947] <inf> mcuboot: TX
[01:51:49.173,828] <inf> mcuboot: Erasing range 0x%jx:0x%jx
[01:51:49.258,270] <inf> mcuboot: Writing at 0x1fb4 until 0x2108
[01:51:49.261,901] <inf> mcuboot: RX: 0x0
[01:51:49.265,258] <inf> mcuboot: TX
[01:51:49.393,035] <inf> mcuboot: Writing at 0x2108 until 0x225c
[01:51:49.396,697] <inf> mcuboot: RX: 0x0
[01:51:49.400,024] <inf> mcuboot: TX
[01:51:49.534,301] <inf> mcuboot: Writing at 0x225c until 0x23b0
[01:51:49.537,963] <inf> mcuboot: RX: 0x0
[01:51:49.541,320] <inf> mcuboot: TX
[01:51:49.676,940] <inf> mcuboot: Writing at 0x23b0 until 0x2504
[01:51:49.680,603] <inf> mcuboot: RX: 0x0
[01:51:49.684,356] <inf> mcuboot: TX
[01:51:49.818,450] <inf> mcuboot: Writing at 0x2504 until 0x2658
[01:51:49.822,082] <inf> mcuboot: RX: 0x0
[01:51:49.825,439] <inf> mcuboot: TX
[01:51:49.958,587] <inf> mcuboot: Writing at 0x2658 until 0x27ac
[01:51:49.962,249] <inf> mcuboot: RX: 0x0
[01:51:49.965,606] <inf> mcuboot: TX
[01:51:50.117,370] <inf> mcuboot: Writing at 0x27ac until 0x2900
[01:51:50.121,032] <inf> mcuboot: RX: 0x0
[01:51:50.124,389] <inf> mcuboot: TX
[01:51:50.258,758] <inf> mcuboot: Writing at 0x2900 until 0x2a54
[01:51:50.262,420] <inf> mcuboot: RX: 0x0
[01:51:50.265,747] <inf> mcuboot: TX
[01:51:50.404,693] <inf> mcuboot: Writing at 0x2a54 until 0x2ba8
[01:51:50.408,782] <inf> mcuboot: RX: 0x0
[01:51:50.412,109] <inf> mcuboot: TX
[01:51:50.547,058] <inf> mcuboot: Writing at 0x2ba8 until 0x2cfc
[01:51:50.550,689] <inf> mcuboot: RX: 0x0
[01:51:50.554,046] <inf> mcuboot: TX
[01:51:50.688,415] <inf> mcuboot: Writing at 0x2cfc until 0x2e50
[01:51:50.692,077] <inf> mcuboot: RX: 0x0
[01:51:50.695,404] <inf> mcuboot: TX
[01:51:50.829,132] <inf> mcuboot: Writing at 0x2e50 until 0x2fa4
[01:51:50.833,221] <inf> mcuboot: RX: 0x0
[01:51:50.836,547] <inf> mcuboot: TX
[01:51:50.970,672] <inf> mcuboot: Erasing range 0x%jx:0x%jx
[01:51:51.055,114] <inf> mcuboot: Writing at 0x2fa4 until 0x30f8
[01:51:51.058,776] <inf> mcuboot: RX: 0x0
[01:51:51.062,103] <inf> mcuboot: TX
[01:51:51.190,490] <inf> mcuboot: Writing at 0x30f8 until 0x324c
[01:51:51.194,122] <inf> mcuboot: RX: 0x0
[01:51:51.197,479] <inf> mcuboot: TX
[01:51:51.331,634] <inf> mcuboot: Writing at 0x324c until 0x33a0
[01:51:51.335,266] <inf> mcuboot: RX: 0x0
[01:51:51.338,623] <inf> mcuboot: TX
[01:51:51.489,227] <inf> mcuboot: Writing at 0x33a0 until 0x34f4
[01:51:51.492,889] <inf> mcuboot: RX: 0x0
[01:51:51.496,246] <inf> mcuboot: TX
[01:51:51.629,516] <inf> mcuboot: Writing at 0x34f4 until 0x3648
[01:51:51.633,148] <inf> mcuboot: RX: 0x0
[01:51:51.636,505] <inf> mcuboot: TX
[01:51:51.772,888] <inf> mcuboot: Writing at 0x3648 until 0x379c
[01:51:51.776,550] <inf> mcuboot: RX: 0x0
[01:51:51.779,876] <inf> mcuboot: TX
[01:51:51.914,215] <inf> mcuboot: Writing at 0x379c until 0x38f0
[01:51:51.917,846] <inf> mcuboot: RX: 0x0
[01:51:51.921,203] <inf> mcuboot: TX
[01:51:52.071,868] <inf> mcuboot: Writing at 0x38f0 until 0x3a44
[01:51:52.075,531] <inf> mcuboot: RX: 0x0
[01:51:52.078,857] <inf> mcuboot: TX
[01:51:52.213,714] <inf> mcuboot: Writing at 0x3a44 until 0x3b98
[01:51:52.217,346] <inf> mcuboot: RX: 0x0
[01:51:52.220,703] <inf> mcuboot: TX
[01:51:52.358,001] <inf> mcuboot: Writing at 0x3b98 until 0x3cec
[01:51:52.361,663] <inf> mcuboot: RX: 0x0
[01:51:52.365,020] <inf> mcuboot: TX
[01:51:52.499,237] <inf> mcuboot: Writing at 0x3cec until 0x3e40
[01:51:52.502,899] <inf> mcuboot: RX: 0x0
[01:51:52.506,652] <inf> mcuboot: TX
[01:51:52.642,089] <inf> mcuboot: Writing at 0x3e40 until 0x3f94
[01:51:52.645,751] <inf> mcuboot: RX: 0x0
[01:51:52.649,078] <inf> mcuboot: TX
[01:51:52.796,020] <inf> mcuboot: Erasing range 0x%jx:0x%jx
[01:51:52.880,462] <inf> mcuboot: Writing at 0x3f94 until 0x40e8
[01:51:52.884,094] <inf> mcuboot: RX: 0x0
[01:51:52.887,451] <inf> mcuboot: TX
[01:51:53.020,629] <inf> mcuboot: Writing at 0x40e8 until 0x423c
[01:51:53.024,291] <inf> mcuboot: RX: 0x0
[01:51:53.027,648] <inf> mcuboot: TX
[01:51:53.163,452] <inf> mcuboot: Writing at 0x423c until 0x4390
[01:51:53.167,114] <inf> mcuboot: RX: 0x0
[01:51:53.170,471] <inf> mcuboot: TX
[01:51:53.304,962] <inf> mcuboot: Writing at 0x4390 until 0x44e4
[01:51:53.308,624] <inf> mcuboot: RX: 0x0
[01:51:53.311,981] <inf> mcuboot: TX
[01:51:53.446,990] <inf> mcuboot: Writing at 0x44e4 until 0x4638
[01:51:53.450,653] <inf> mcuboot: RX: 0x0
[01:51:53.453,979] <inf> mcuboot: TX
[01:51:53.587,738] <inf> mcuboot: Writing at 0x4638 until 0x478c
[01:51:53.591,400] <inf> mcuboot: RX: 0x0
[01:51:53.594,726] <inf> mcuboot: TX
[01:51:53.729,431] <inf> mcuboot: Writing at 0x478c until 0x48e0
[01:51:53.733,093] <inf> mcuboot: RX: 0x0
[01:51:53.736,450] <inf> mcuboot: TX
[01:51:53.871,856] <inf> mcuboot: Writing at 0x48e0 until 0x4a34
[01:51:53.875,488] <inf> mcuboot: RX: 0x0
[01:51:53.879,272] <inf> mcuboot: TX
[01:51:54.027,618] <inf> mcuboot: Writing at 0x4a34 until 0x4b88
[01:51:54.031,677] <inf> mcuboot: RX: 0x0
[01:51:54.035,034] <inf> mcuboot: TX
[01:51:54.168,090] <inf> mcuboot: Writing at 0x4b88 until 0x4cdc
[01:51:54.171,752] <inf> mcuboot: RX: 0x0
[01:51:54.175,079] <inf> mcuboot: TX
[01:51:54.310,699] <inf> mcuboot: Writing at 0x4cdc until 0x4e30
[01:51:54.314,361] <inf> mcuboot: RX: 0x0
[01:51:54.317,718] <inf> mcuboot: TX
[01:51:54.467,590] <inf> mcuboot: Writing at 0x4e30 until 0x4f84
[01:51:54.471,252] <inf> mcuboot: RX: 0x0
[01:51:54.474,578] <inf> mcuboot: TX
[01:51:54.608,764] <inf> mcuboot: Erasing range 0x%jx:0x%jx
[01:51:54.693,237] <inf> mcuboot: Writing at 0x4f84 until 0x50d8
[01:51:54.696,868] <inf> mcuboot: RX: 0x0
[01:51:54.700,225] <inf> mcuboot: TX
[01:51:54.828,521] <inf> mcuboot: Writing at 0x50d8 until 0x522c
[01:51:54.832,183] <inf> mcuboot: RX: 0x0
[01:51:54.835,540] <inf> mcuboot: TX
[01:51:54.971,343] <inf> mcuboot: Writing at 0x522c until 0x5380
[01:51:54.975,006] <inf> mcuboot: RX: 0x0
[01:51:54.978,332] <inf> mcuboot: TX
[01:51:55.113,250] <inf> mcuboot: Writing at 0x5380 until 0x54d4
[01:51:55.117,309] <inf> mcuboot: RX: 0x0
[01:51:55.120,666] <inf> mcuboot: TX
[01:51:55.254,791] <inf> mcuboot: Writing at 0x54d4 until 0x5628
[01:51:55.258,453] <inf> mcuboot: RX: 0x0
[01:51:55.261,779] <inf> mcuboot: TX
[01:51:55.396,789] <inf> mcuboot: Writing at 0x5628 until 0x577c
[01:51:55.400,451] <inf> mcuboot: RX: 0x0
[01:51:55.403,808] <inf> mcuboot: TX
[01:51:55.538,452] <inf> mcuboot: Writing at 0x577c until 0x58d0
[01:51:55.542,541] <inf> mcuboot: RX: 0x0
[01:51:55.545,867] <inf> mcuboot: TX
[01:51:55.680,908] <inf> mcuboot: Writing at 0x58d0 until 0x5a24
[01:51:55.684,570] <inf> mcuboot: RX: 0x0
[01:51:55.687,896] <inf> mcuboot: TX
[01:51:55.822,296] <inf> mcuboot: Writing at 0x5a24 until 0x5b78
[01:51:55.825,958] <inf> mcuboot: RX: 0x0
[01:51:55.829,315] <inf> mcuboot: TX
[01:51:55.965,026] <inf> mcuboot: Writing at 0x5b78 until 0x5ccc
[01:51:55.968,688] <inf> mcuboot: RX: 0x0
[01:51:55.972,045] <inf> mcuboot: TX
[01:51:56.107,482] <inf> mcuboot: Writing at 0x5ccc until 0x5e20
[01:51:56.111,145] <inf> mcuboot: RX: 0x0
[01:51:56.114,898] <inf> mcuboot: TX
[01:51:56.265,777] <inf> mcuboot: Writing at 0x5e20 until 0x5f74
[01:51:56.269,439] <inf> mcuboot: RX: 0x0
[01:51:56.272,796] <inf> mcuboot: TX
[01:51:56.407,318] <inf> mcuboot: Erasing range 0x%jx:0x%jx
[01:51:56.491,760] <inf> mcuboot: Writing at 0x5f74 until 0x60c8
[01:51:56.495,422] <inf> mcuboot: RX: 0x0
[01:51:56.498,748] <inf> mcuboot: TX
[01:51:56.629,089] <inf> mcuboot: Writing at 0x60c8 until 0x621c
[01:51:56.632,751] <inf> mcuboot: RX: 0x0
[01:51:56.636,108] <inf> mcuboot: TX
[01:51:56.770,568] <inf> mcuboot: Writing at 0x621c until 0x6370
[01:51:56.774,230] <inf> mcuboot: RX: 0x0
[01:51:56.777,557] <inf> mcuboot: TX
[01:51:56.928,222] <inf> mcuboot: Writing at 0x6370 until 0x64c4
[01:51:56.931,884] <inf> mcuboot: RX: 0x0
[01:51:56.935,241] <inf> mcuboot: TX
[01:51:57.069,854] <inf> mcuboot: Writing at 0x64c4 until 0x6618
[01:51:57.073,516] <inf> mcuboot: RX: 0x0
[01:51:57.076,873] <inf> mcuboot: TX
[01:51:57.213,348] <inf> mcuboot: Writing at 0x6618 until 0x676c
[01:51:57.217,437] <inf> mcuboot: RX: 0x0
[01:51:57.220,764] <inf> mcuboot: TX
[01:51:57.354,095] <inf> mcuboot: Writing at 0x676c until 0x68c0
[01:51:57.357,757] <inf> mcuboot: RX: 0x0
[01:51:57.361,114] <inf> mcuboot: TX
[01:51:57.510,375] <inf> mcuboot: Writing at 0x68c0 until 0x6a14
[01:51:57.514,038] <inf> mcuboot: RX: 0x0
[01:51:57.517,364] <inf> mcuboot: TX
[01:51:57.651,519] <inf> mcuboot: Writing at 0x6a14 until 0x6b68
[01:51:57.655,151] <inf> mcuboot: RX: 0x0
[01:51:57.658,508] <inf> mcuboot: TX
[01:51:57.793,762] <inf> mcuboot: Writing at 0x6b68 until 0x6cbc
[01:51:57.797,393] <inf> mcuboot: RX: 0x0
[01:51:57.800,750] <inf> mcuboot: TX
[01:51:57.934,417] <inf> mcuboot: Writing at 0x6cbc until 0x6e10
[01:51:57.938,049] <inf> mcuboot: RX: 0x0
[01:51:57.941,406] <inf> mcuboot: TX
[01:51:58.093,688] <inf> mcuboot: Writing at 0x6e10 until 0x6f64
[01:51:58.097,351] <inf> mcuboot: RX: 0x0
[01:51:58.100,708] <inf> mcuboot: TX
[01:51:58.234,161] <inf> mcuboot: Erasing range 0x%jx:0x%jx
[01:51:58.318,603] <inf> mcuboot: Writing at 0x6f64 until 0x70b8
[01:51:58.322,265] <inf> mcuboot: RX: 0x0
[01:51:58.325,622] <inf> mcuboot: TX
[01:51:58.454,589] <inf> mcuboot: Writing at 0x70b8 until 0x720c
[01:51:58.458,251] <inf> mcuboot: RX: 0x0
[01:51:58.461,578] <inf> mcuboot: TX
[01:51:58.593,231] <inf> mcuboot: Writing at 0x720c until 0x7360
[01:51:58.596,893] <inf> mcuboot: RX: 0x0
[01:51:58.600,219] <inf> mcuboot: TX
[01:51:58.736,328] <inf> mcuboot: Writing at 0x7360 until 0x74b4
[01:51:58.739,990] <inf> mcuboot: RX: 0x0
[01:51:58.743,713] <inf> mcuboot: TX
[01:51:58.876,831] <inf> mcuboot: Writing at 0x74b4 until 0x7608
[01:51:58.880,493] <inf> mcuboot: RX: 0x0
[01:51:58.883,850] <inf> mcuboot: TX
[01:51:59.020,477] <inf> mcuboot: Writing at 0x7608 until 0x775c
[01:51:59.024,139] <inf> mcuboot: RX: 0x0
[01:51:59.027,496] <inf> mcuboot: TX
[01:51:59.176,086] <inf> mcuboot: Writing at 0x775c until 0x78b0
[01:51:59.179,748] <inf> mcuboot: RX: 0x0
[01:51:59.183,074] <inf> mcuboot: TX
[01:51:59.317,260] <inf> mcuboot: Writing at 0x78b0 until 0x7a04
[01:51:59.320,922] <inf> mcuboot: RX: 0x0
[01:51:59.324,249] <inf> mcuboot: TX
[01:51:59.458,984] <inf> mcuboot: Writing at 0x7a04 until 0x7b58
[01:51:59.462,646] <inf> mcuboot: RX: 0x0
[01:51:59.466,003] <inf> mcuboot: TX
[01:51:59.599,853] <inf> mcuboot: Writing at 0x7b58 until 0x7cac
[01:51:59.603,515] <inf> mcuboot: RX: 0x0
[01:51:59.606,872] <inf> mcuboot: TX
[01:51:59.756,774] <inf> mcuboot: Writing at 0x7cac until 0x7e00
[01:51:59.760,437] <inf> mcuboot: RX: 0x0
[01:51:59.763,763] <inf> mcuboot: TX
[01:51:59.899,169] <inf> mcuboot: Writing at 0x7e00 until 0x7f54
[01:51:59.902,832] <inf> mcuboot: RX: 0x0
[01:51:59.906,188] <inf> mcuboot: TX
[01:52:00.041,687] <inf> mcuboot: Erasing range 0x%jx:0x%jx
[01:52:00.126,129] <inf> mcuboot: Writing at 0x7f54 until 0x80a8
[01:52:00.129,791] <inf> mcuboot: RX: 0x0
[01:52:00.133,148] <inf> mcuboot: TX
[01:52:00.261,871] <inf> mcuboot: Writing at 0x80a8 until 0x81fc
[01:52:00.265,533] <inf> mcuboot: RX: 0x0
[01:52:00.268,890] <inf> mcuboot: TX
[01:52:00.402,160] <inf> mcuboot: Writing at 0x81fc until 0x8350
[01:52:00.405,822] <inf> mcuboot: RX: 0x0
[01:52:00.409,149] <inf> mcuboot: TX
[01:52:00.542,938] <inf> mcuboot: Writing at 0x8350 until 0x84a4
[01:52:00.546,600] <inf> mcuboot: RX: 0x0
[01:52:00.550,384] <inf> mcuboot: TX
[01:52:00.685,089] <inf> mcuboot: Writing at 0x84a4 until 0x85f8
[01:52:00.688,751] <inf> mcuboot: RX: 0x0
[01:52:00.692,077] <inf> mcuboot: TX
[01:52:00.842,926] <inf> mcuboot: Writing at 0x85f8 until 0x874c
[01:52:00.846,588] <inf> mcuboot: RX: 0x0
[01:52:00.849,914] <inf> mcuboot: TX
[01:52:00.983,520] <inf> mcuboot: Writing at 0x874c until 0x88a0
[01:52:00.987,182] <inf> mcuboot: RX: 0x0
[01:52:00.990,539] <inf> mcuboot: TX
[01:52:01.126,037] <inf> mcuboot: Writing at 0x88a0 until 0x89f4
[01:52:01.129,699] <inf> mcuboot: RX: 0x0
[01:52:01.133,026] <inf> mcuboot: TX
[01:52:01.268,371] <inf> mcuboot: Writing at 0x89f4 until 0x8b48
[01:52:01.272,033] <inf> mcuboot: RX: 0x0
[01:52:01.275,756] <inf> mcuboot: TX
[01:52:01.410,888] <inf> mcuboot: Writing at 0x8b48 until 0x8c9c
[01:52:01.414,520] <inf> mcuboot: RX: 0x0
[01:52:01.417,877] <inf> mcuboot: TX
[01:52:01.553,497] <inf> mcuboot: Writing at 0x8c9c until 0x8df0
[01:52:01.557,159] <inf> mcuboot: RX: 0x0
[01:52:01.560,485] <inf> mcuboot: TX
[01:52:01.694,274] <inf> mcuboot: Writing at 0x8df0 until 0x8f44
[01:52:01.698,333] <inf> mcuboot: RX: 0x0
[01:52:01.701,690] <inf> mcuboot: TX
[01:52:01.835,174] <inf> mcuboot: Erasing range 0x%jx:0x%jx
[01:52:01.919,616] <inf> mcuboot: Writing at 0x8f44 until 0x9098
[01:52:01.923,278] <inf> mcuboot: RX: 0x0
[01:52:01.926,635] <inf> mcuboot: TX
[01:52:02.072,418] <inf> mcuboot: Writing at 0x9098 until 0x91ec
[01:52:02.076,080] <inf> mcuboot: RX: 0x0
[01:52:02.079,437] <inf> mcuboot: TX
[01:52:02.214,294] <inf> mcuboot: Writing at 0x91ec until 0x9340
[01:52:02.217,956] <inf> mcuboot: RX: 0x0
[01:52:02.221,313] <inf> mcuboot: TX
[01:52:02.356,872] <inf> mcuboot: Writing at 0x9340 until 0x9494
[01:52:02.360,534] <inf> mcuboot: RX: 0x0
[01:52:02.363,891] <inf> mcuboot: TX
[01:52:02.499,053] <inf> mcuboot: Writing at 0x9494 until 0x95e8
[01:52:02.502,685] <inf> mcuboot: RX: 0x0
[01:52:02.506,042] <inf> mcuboot: TX
[01:52:02.639,587] <inf> mcuboot: Writing at 0x95e8 until 0x973c
[01:52:02.643,249] <inf> mcuboot: RX: 0x0
[01:52:02.647,033] <inf> mcuboot: TX
[01:52:02.781,036] <inf> mcuboot: Writing at 0x973c until 0x9890
[01:52:02.784,698] <inf> mcuboot: RX: 0x0
[01:52:02.788,024] <inf> mcuboot: TX
[01:52:02.923,248] <inf> mcuboot: Writing at 0x9890 until 0x99e4
[01:52:02.926,879] <inf> mcuboot: RX: 0x0
[01:52:02.930,236] <inf> mcuboot: TX
[01:52:03.065,002] <inf> mcuboot: Writing at 0x99e4 until 0x9b38
[01:52:03.069,061] <inf> mcuboot: RX: 0x0
[01:52:03.072,418] <inf> mcuboot: TX
[01:52:03.208,221] <inf> mcuboot: Writing at 0x9b38 until 0x9c8c
[01:52:03.211,883] <inf> mcuboot: RX: 0x0
[01:52:03.215,240] <inf> mcuboot: TX
[01:52:03.364,166] <inf> mcuboot: Writing at 0x9c8c until 0x9de0
[01:52:03.367,828] <inf> mcuboot: RX: 0x0
[01:52:03.371,612] <inf> mcuboot: TX
[01:52:03.505,767] <inf> mcuboot: Writing at 0x9de0 until 0x9f34
[01:52:03.509,429] <inf> mcuboot: RX: 0x0
[01:52:03.512,756] <inf> mcuboot: TX
[01:52:03.649,688] <inf> mcuboot: Erasing range 0x%jx:0x%jx
[01:52:03.734,130] <inf> mcuboot: Writing at 0x9f34 until 0xa088
[01:52:03.737,792] <inf> mcuboot: RX: 0x0
[01:52:03.741,119] <inf> mcuboot: TX
[01:52:03.871,246] <inf> mcuboot: Writing at 0xa088 until 0xa1dc
[01:52:03.874,908] <inf> mcuboot: RX: 0x0
[01:52:03.878,234] <inf> mcuboot: TX
[01:52:04.028,320] <inf> mcuboot: Writing at 0xa1dc until 0xa330
[01:52:04.031,982] <inf> mcuboot: RX: 0x0
[01:52:04.035,308] <inf> mcuboot: TX
[01:52:04.170,745] <inf> mcuboot: Writing at 0xa330 until 0xa484
[01:52:04.174,407] <inf> mcuboot: RX: 0x0
[01:52:04.177,764] <inf> mcuboot: TX
[01:52:04.313,049] <inf> mcuboot: Writing at 0xa484 until 0xa5d8
[01:52:04.316,711] <inf> mcuboot: RX: 0x0
[01:52:04.320,068] <inf> mcuboot: TX
[01:52:04.454,956] <inf> mcuboot: Writing at 0xa5d8 until 0xa72c
[01:52:04.458,618] <inf> mcuboot: RX: 0x0
[01:52:04.462,371] <inf> mcuboot: TX
[01:52:04.611,724] <inf> mcuboot: Writing at 0xa72c until 0xa880
[01:52:04.615,386] <inf> mcuboot: RX: 0x0
[01:52:04.618,713] <inf> mcuboot: TX
[01:52:04.754,089] <inf> mcuboot: Writing at 0xa880 until 0xa9d4
[01:52:04.757,720] <inf> mcuboot: RX: 0x0
[01:52:04.761,474] <inf> mcuboot: TX
[01:52:04.895,019] <inf> mcuboot: Writing at 0xa9d4 until 0xab28
[01:52:04.898,681] <inf> mcuboot: RX: 0x0
[01:52:04.902,038] <inf> mcuboot: TX
[01:52:05.035,919] <inf> mcuboot: Writing at 0xab28 until 0xac7c
[01:52:05.039,581] <inf> mcuboot: RX: 0x0
[01:52:05.042,907] <inf> mcuboot: TX
[01:52:05.193,634] <inf> mcuboot: Writing at 0xac7c until 0xadd0
[01:52:05.197,296] <inf> mcuboot: RX: 0x0
[01:52:05.200,622] <inf> mcuboot: TX
[01:52:05.336,730] <inf> mcuboot: Writing at 0xadd0 until 0xaf24
[01:52:05.340,393] <inf> mcuboot: RX: 0x0
[01:52:05.343,750] <inf> mcuboot: TX
[01:52:05.478,424] <inf> mcuboot: Erasing range 0x%jx:0x%jx
[01:52:05.562,866] <inf> mcuboot: Writing at 0xaf24 until 0xb078
[01:52:05.566,528] <inf> mcuboot: RX: 0x0
[01:52:05.569,885] <inf> mcuboot: TX
[01:52:05.699,066] <inf> mcuboot: Writing at 0xb078 until 0xb1cc
[01:52:05.702,728] <inf> mcuboot: RX: 0x0
[01:52:05.706,054] <inf> mcuboot: TX
[01:52:05.855,438] <inf> mcuboot: Writing at 0xb1cc until 0xb320
[01:52:05.859,100] <inf> mcuboot: RX: 0x0
[01:52:05.862,457] <inf> mcuboot: TX
[01:52:05.998,809] <inf> mcuboot: Writing at 0xb320 until 0xb474
[01:52:06.002,441] <inf> mcuboot: RX: 0x0
[01:52:06.005,798] <inf> mcuboot: TX
[01:52:06.139,312] <inf> mcuboot: Writing at 0xb474 until 0xb5c8
[01:52:06.142,974] <inf> mcuboot: RX: 0x0
[01:52:06.146,331] <inf> mcuboot: TX
[01:52:06.281,799] <inf> mcuboot: Writing at 0xb5c8 until 0xb71c
[01:52:06.285,461] <inf> mcuboot: RX: 0x0
[01:52:06.289,215] <inf> mcuboot: TX
[01:52:06.438,507] <inf> mcuboot: Writing at 0xb71c until 0xb870
[01:52:06.442,596] <inf> mcuboot: RX: 0x0
[01:52:06.445,922] <inf> mcuboot: TX
[01:52:06.580,230] <inf> mcuboot: Writing at 0xb870 until 0xb9c4
[01:52:06.583,892] <inf> mcuboot: RX: 0x0
[01:52:06.587,249] <inf> mcuboot: TX
[01:52:06.723,083] <inf> mcuboot: Writing at 0xb9c4 until 0xbb18
[01:52:06.726,745] <inf> mcuboot: RX: 0x0
[01:52:06.730,072] <inf> mcuboot: TX
[01:52:06.864,379] <inf> mcuboot: Writing at 0xbb18 until 0xbc6c
[01:52:06.868,011] <inf> mcuboot: RX: 0x0
[01:52:06.871,368] <inf> mcuboot: TX
[01:52:07.023,193] <inf> mcuboot: Writing at 0xbc6c until 0xbdc0
[01:52:07.026,855] <inf> mcuboot: RX: 0x0
[01:52:07.030,212] <inf> mcuboot: TX
[01:52:07.165,649] <inf> mcuboot: Writing at 0xbdc0 until 0xbf14
[01:52:07.169,311] <inf> mcuboot: RX: 0x0
[01:52:07.172,637] <inf> mcuboot: TX
[01:52:07.306,335] <inf> mcuboot: Erasing range 0x%jx:0x%jx
[01:52:07.390,777] <inf> mcuboot: Writing at 0xbf14 until 0xc068
[01:52:07.394,439] <inf> mcuboot: RX: 0x0
[01:52:07.397,796] <inf> mcuboot: TX
[01:52:07.526,092] <inf> mcuboot: Writing at 0xc068 until 0xc1bc
[01:52:07.529,754] <inf> mcuboot: RX: 0x0
[01:52:07.533,081] <inf> mcuboot: TX
[01:52:07.666,900] <inf> mcuboot: Writing at 0xc1bc until 0xc310
[01:52:07.670,562] <inf> mcuboot: RX: 0x0
[01:52:07.673,919] <inf> mcuboot: TX
[01:52:07.807,067] <inf> mcuboot: Writing at 0xc310 until 0xc464
[01:52:07.810,729] <inf> mcuboot: RX: 0x0
[01:52:07.814,514] <inf> mcuboot: TX
[01:52:07.948,303] <inf> mcuboot: Writing at 0xc464 until 0xc5b8
[01:52:07.951,965] <inf> mcuboot: RX: 0x0
[01:52:07.955,291] <inf> mcuboot: TX
[01:52:08.106,353] <inf> mcuboot: Writing at 0xc5b8 until 0xc70c
[01:52:08.110,015] <inf> mcuboot: RX: 0x0
[01:52:08.113,342] <inf> mcuboot: TX
[01:52:08.247,253] <inf> mcuboot: Writing at 0xc70c until 0xc860
[01:52:08.250,915] <inf> mcuboot: RX: 0x0
[01:52:08.254,241] <inf> mcuboot: TX
[01:52:08.390,380] <inf> mcuboot: Writing at 0xc860 until 0xc9b4
[01:52:08.394,042] <inf> mcuboot: RX: 0x0
[01:52:08.397,369] <inf> mcuboot: TX
[01:52:08.532,806] <inf> mcuboot: Writing at 0xc9b4 until 0xcb08
[01:52:08.536,468] <inf> mcuboot: RX: 0x0
[01:52:08.540,161] <inf> mcuboot: TX
[01:52:08.674,468] <inf> mcuboot: Writing at 0xcb08 until 0xcc5c
[01:52:08.678,131] <inf> mcuboot: RX: 0x0
[01:52:08.681,457] <inf> mcuboot: TX
[01:52:08.817,474] <inf> mcuboot: Writing at 0xcc5c until 0xcdb0
[01:52:08.821,136] <inf> mcuboot: RX: 0x0
[01:52:08.824,462] <inf> mcuboot: TX
[01:52:08.958,709] <inf> mcuboot: Writing at 0xcdb0 until 0xcf04
[01:52:08.962,799] <inf> mcuboot: RX: 0x0
[01:52:08.966,125] <inf> mcuboot: TX
[01:52:09.099,914] <inf> mcuboot: Erasing range 0x%jx:0x%jx
[01:52:09.184,356] <inf> mcuboot: Writing at 0xcf04 until 0xd058
[01:52:09.188,018] <inf> mcuboot: RX: 0x0
[01:52:09.191,345] <inf> mcuboot: TX
[01:52:09.338,226] <inf> mcuboot: Writing at 0xd058 until 0xd1ac
[01:52:09.341,888] <inf> mcuboot: RX: 0x0
[01:52:09.345,245] <inf> mcuboot: TX
[01:52:09.495,605] <inf> mcuboot: Writing at 0xd1ac until 0xd300
[01:52:09.499,267] <inf> mcuboot: RX: 0x0
[01:52:09.502,593] <inf> mcuboot: TX
[01:52:09.638,153] <inf> mcuboot: Writing at 0xd300 until 0xd454
[01:52:09.641,784] <inf> mcuboot: RX: 0x0
[01:52:09.645,141] <inf> mcuboot: TX
[01:52:09.780,731] <inf> mcuboot: Writing at 0xd454 until 0xd5a8
[01:52:09.784,393] <inf> mcuboot: RX: 0x0
[01:52:09.787,750] <inf> mcuboot: TX
[01:52:09.926,452] <inf> mcuboot: Writing at 0xd5a8 until 0xd6fc
[01:52:09.930,114] <inf> mcuboot: RX: 0x0
[01:52:09.933,471] <inf> mcuboot: TX
[01:52:10.070,190] <inf> mcuboot: Writing at 0xd6fc until 0xd850
[01:52:10.073,852] <inf> mcuboot: RX: 0x0
[01:52:10.077,178] <inf> mcuboot: TX
[01:52:10.153,869] <inf> mcuboot: Writing at 0xd850 until 0xd910
[01:52:10.156,066] <inf> mcuboot: Erasing range 0x%jx:0x%jx
[01:52:10.240,844] <inf> mcuboot: RX: 0x0
[01:52:10.244,201] <inf> mcuboot: TX

[AHaug]

Hi,

Initially I would recommend you to create a new case since this is a new topic  

Secondly here are a couple of thoughts that you can do for testing before creating this new case:

1. You should be aware of this warning regarding NSIB
• QuentinD said:

  There is a small peculiarity to my project: I defined CONFIG_SINGLE_APPLICATION_SLOT=y so as not to have to double the memory of my application (works very well if I only have the MCUboot).
2.  Regarding MCUboot images. Correct me if I am wrong, but I suspect that you may believe that MCUboot updates work the same as "regular" application updates. It's not quite the same, as the new MCUboot image is uploaded to mcuboot_secondary before it is swapped to s1. Then NSIB reads a flag stating which slot it should run MCUBOOT from, i.e s0 or s1 depending on which is the latest update, and then MCUboot starts the application.
   
   It might be possible to set https://github.com/nrfconnect/sdk-mcuboot/blob/main/boot/zephyr/Kconfig.serial_recovery#L49 MCUBOOT_SERIAL_DIRECT_IMAGE_UPLOAD and "-n" to upload the image to s1 directly, or it might be possible to use MCUBOOT_SERIAL_DIRECT_IMAGE_UPLOAD and the file that is only signed by b0.
   
   I haven't tested this at all, so this is a large disclaimer that this might not work at all

Kind regards,
Andreas

[QuentinD]

Thank you for your response but I'm sorry I still can't update the bootlaoder.

I configured MCUBOOT_SERIAL_DIRECT_IMAGE_UPLOAD=y.

I tried these commands:
mcumgr -c my_config image upload Application\TA_Smart\zephyr\signed_by_mcuboot_and_b0_s1_image_update.bin -n 1 --> this writes the file to my application partition (mcuboot_primary)

mcumgr -c my_config image upload Application\TA_Smart\zephyr\signed_by_mcuboot_and_b0_s1_image_update.bin -n 2 --> this writes the file to mcuboot_secondary (after reboot, nothing is copied to the s1 partition)

mcumgr -c my_config image upload Application\TA_Smart\zephyr\signed_by_mcuboot_and_b0_s1_image_update.bin -n 3
mcumgr -c my_config image upload Application\TA_Smart\zephyr\signed_by_mcuboot_and_b0_s1_image_update.bin -n 4
--> I can't load the file because the bootloader returns <inf> mcuboot: RX: 0x3

So how can I write to the s1 partition? Which partition do "-n 3" and "-n 4" correspond to?

[AHaug]

Hi,

Apologies for the longer response time since my previous reply 

QuentinD said:

I tried these commands:
mcumgr -c my_config image upload Application\TA_Smart\zephyr\signed_by_mcuboot_and_b0_s1_image_update.bin -n 1 --> this writes the file to my application partition (mcuboot_primary)

mcumgr -c my_config image upload Application\TA_Smart\zephyr\signed_by_mcuboot_and_b0_s1_image_update.bin -n 2 --> this writes the file to mcuboot_secondary (after reboot, nothing is copied to the s1 partition)

This is as expected, as you've only uploaded the slots to primary and secondary mcuboot application slots. When uploading the new firmware to s1 with the upload command it only stores the image here and does not swap at restart. 

You will first have to mark the image in s1 as "ready for DFU" by using test, confirm, or test & confirm using mcumgr <connection-options> image test <hash>

From https://developer.nordicsemi.com/nRF_Connect_SDK/doc/latest/zephyr/services/device_mgmt/mcumgr.html it is stated

This command should mark a test upgrade, which means that after the next reboot the bootloader will execute the upgrade and jump into the new image. If no other image operations are executed on the newly running image, it will revert back to the image that was previously running on the device on the subsequent reset. When a test is requested, flags will be updated with pending to inform that a new image will be run after a reset:

After this you can use the "confirm" option when you see that the image in s1 has changed from " " to "confirmed" before performing a pin-reset which will swap the images in the new boot

QuentinD said:

mcumgr -c my_config image upload Application\TA_Smart\zephyr\signed_by_mcuboot_and_b0_s1_image_update.bin -n 3
mcumgr -c my_config image upload Application\TA_Smart\zephyr\signed_by_mcuboot_and_b0_s1_image_update.bin -n 4
--> I can't load the file because the bootloader returns <inf> mcuboot: RX: 0x3

When uploading the bootloader you don't need the -n tag, as the image number is not relevant for the bootloader

See this sample for how to use mcumgr to upload and update signed_by_mcuboot_and_b0_s1_image_update.bin https://github.com/hellesvik-nordic/samples_for_nrf_connect_sdk/tree/main/bootloader_samples/updatable_bootloader/nsib_mcuboot_smp 

Let me know if this answers your questions

Kind regards,
Andreas

[QuentinD]

Thank you for these explanations.

The problem I have here is that I cannot execute the commands that you told me (test, confirm, ...) because I do not see the hash and even less the image that I have uploded.

Here is my upload with the result:


If I do the upload command without the "-n 2", it overwrites my application (mcuboot_primary). So that's why I put "-n 2" so that the application is not deleted and that it puts the bootloader file in the only partition that I have access to (mcuboot_secondary).

[AHaug]

Hi, 

This is just an update to let you know that I will return to you with an answer to your questions early next week. I'm waiting for some internal feedback to verify the answer your question

I'll check in again on Monday

Kind regards,
Andreas

[QuentinD]

Hi,

Thank you for your follow-up.

Haven't received a response yet?