NRF5340 - QSPI has slower performance than single lane SPI with external QSPI flash

[herbata]

QSPI has slower performance than single lane SPI using same CLK frequency with external QSPI flash with LittleFS.

Registers have been reconfigured according to your Errata;

  NRF_QSPI->IFTIMING = ((uint32_t)6 << QSPI_IFTIMING_RXDELAY_Pos) & QSPI_IFTIMING_RXDELAY_Msk;

  NRF_QSPI->IFCONFIG0 &= ~(1 << 17);

  NRF_QSPI->IFCONFIG0 |= (1 << 16);

System is using Zephyr os with kconfig file containig:

CONFIG_NORDIC_QSPI_NOR=y

CONFIG_SPI_NOR_SFDP_RUNTIME=y

CONFIG_FLASH_JESD216_API=y

CONFIG_FLASH_PAGE_LAYOUT=y

and dts file :

&qspi {

    label = "spi-ext-flash";

    compatible = "nordic,nrf-qspi";

    status = "okay";

    pinctrl-0 = <&qspi_default>;

    pinctrl-1 = <&qspi_sleep>;

    pinctrl-names = "default", "sleep";

    mx66: mx66Flash@0 {

        compatible = "nordic,qspi-nor";

        reg = <0>;

        writeoc = "pp4io";

        readoc = "read4io";

        sck-frequency = <16000000>;

        jedec-id = [ c2 25 3b  ];

        size = <1073741824>;    /* 1 Gigabit */

        has-dpd;

        address-size-32;

        enter-4byte-addr = <0x85>;

        t-enter-dpd = <10000>;

        t-exit-dpd = <30000>;

    };

};

    qspi_default: qspi_default {

        group1 {

            psels = <NRF_PSEL(QSPI_IO0, 0, 13)>, <NRF_PSEL(QSPI_IO1, 0, 14)>, <NRF_PSEL(QSPI_IO2, 0, 15)>, <NRF_PSEL(QSPI_IO3, 0, 16)>, <NRF_PSEL(QSPI_CSN, 0, 18)>, <NRF_PSEL(QSPI_SCK, 0, 17)>;

        };

    };

    qspi_sleep: qspi_sleep {

        group1 {

            psels = <NRF_PSEL(QSPI_IO0, 0, 13)>, <NRF_PSEL(QSPI_IO1, 0, 14)>, <NRF_PSEL(QSPI_IO2, 0, 15)>, <NRF_PSEL(QSPI_IO3, 0, 16)>, <NRF_PSEL(QSPI_CSN, 0, 18)>, <NRF_PSEL(QSPI_SCK, 0, 17)>;

            low-power-enable;

        };

    };

Can you let me know if this issue is known to you? How to resolve problem of slow transmission? What additional steps or configs have to be issued to enable full speed of QSPI?

[Rory]

It's likely due to the very long time to enter deep-powerdown (t-enter-dpd) and time to exit deep-powerdown (t-exit-dpd). The driver must enter and exit deep powerdown before and after every interaction with the chip, and those wait times each get rounded up the nearest millisecond.

Try disabling dpd and see if that speeds things up.

[herbata]

Thank you for your response. I tried to disable pdp mode but observed no improvement over previous run.

Current dts file config:

        compatible = "nordic,qspi-nor";

        reg = <0>;

        writeoc = "pp4io";

        readoc = "read4io";

        sck-frequency = <16000000>;

        jedec-id = [ c2 25 3b  ];

        size = <1073741824>;    /* 1 Gigabit */

        //has-dpd;

        address-size-32;

        enter-4byte-addr = <0x85>;

        //t-enter-dpd = <10000>;

        //t-exit-dpd = <30000>;

What other options would you suggest?

[Rory]

Have you tried running faster than 16MHz sck-frequency? It looks like the Macronix MX66 supports reading up to 50MHz and writing up to 133MHz. The nRF5340 supports QSPI speeds from 6 to 96 MHz. I would try setting the frequency to 50MHz (keeping DPD disabled still).

sck-frequency = <50000000>;

[herbata]

Thank you for your input. This is valid point and we considered in but 16MHz has to be kept because of EMC compatibility. Nevertheless, It seems that theoretically QSPI should give:

• 4 times faster transfer, or
• if the LittleFS overhead takes majority of time, transfer time should be close to classic SPI

But that's not what we observe. Right now SPI is performing faster than QSPI when writing file to flash (same clock), which is not aligning with QSPI specs. 

[Rory]

Unfortunately, I'm out of ideas. I'm using QSPI on the nRF5340 with an Infineon S25FL064L 64Mb (8 MB) flash chip, and it is lightning fast compared to ordinary SPI. Here is my dts definition, maybe it will help.

&qspi {
	status = "okay";
	pinctrl-0 = <&qspi_default>;
	pinctrl-1 = <&qspi_sleep>;
	pinctrl-names = "default", "sleep";
	s25fl064l: s25fl064l@0 {
		compatible = "nordic,qspi-nor";
		reg = <0>;
		/* S25FL064L supports pp4o (Quad Page Program (QPP) instruction 0x32) */
		writeoc = "pp4o";
		/* S25FL064L supports read4o (Quad Output Read (QOR) instruction 0x6B) */
		readoc = "read4o";
		quad-enable-requirements = "S2B1v5";
		sck-frequency = <108000000>;
		jedec-id = [01 60 17];
		sfdp-bfp = [
			e5 20 fb ff  ff ff ff 03  48 eb 08 6b  08 3b 88 bb
			fe ff ff ff  ff ff ff ff  ff ff 48 eb  0c 20 0f 52
			10 d8 00 ff  31 92 0d ff  81 66 4e cd  cc 83 18 44
			7a 75 7a 75  f7 a2 d5 5c  22 f6 5d ff  e8 50 f8 a1
		];
		size = <67108864>;
		/* has-dpd; */
		/* t-enter-dpd = <3000>; */
		/* t-exit-dpd = <5000>; */
	};
};