I have a few questions of flash_fstorage_s140_pca10056 example.

[jake.s]

Hi, I am new to the Nordic nrf52840, and want to start new project.

Currently, I am testing flash_fstorage_s140_pca10056 example.(version is : nRF5_SDK_17.0.2), and got successfully used the read and write functions to flash.

While testing this example, I got a few wonders. 

static uint32_t nrf5_flash_end_addr_get()
{
  uint32_t const bootloader_addr = BOOTLOADER_ADDRESS;
  uint32_t const page_sz = NRF_FICR->CODEPAGESIZE;
  uint32_t const code_sz = NRF_FICR->CODESIZE;

  return (bootloader_addr != 0xFFFFFFFF ?
  bootloader_addr : (code_sz * page_sz));
}

1. In uint32_t nrf5_flash_end_addr_get() function, I get it why it return 0x00010000(code_sz * page_sz). But I am curious why the value of code_sz is (0x00001000) and the value of page_sz is (0x00000100)(I checked this in debug mod). Is this values are variable to entire project size? If so, can I expect this values?

2. I get it the last address on the last page is equal to UICR.NRFFW[0]. But why every value of NRFFW is 0xffffffff? Is there other meaning that I didnt find?

[Hieu]

Hi jake.s,

1. In uint32_t nrf5_flash_end_addr_get() function, I get it why it return 0x00010000(code_sz * page_sz). But I am curious why the value of code_sz is (0x00001000) and the value of page_sz is (0x00000100)(I checked this in debug mod). Is this values are variable to entire project size? If so, can I expect this values?

CODESIZE and CODEPAGESIZE are registers in the FICR (Factory Information Configuration Registers) group, and you can find them documented on the FICR page.

As written there, CODESIZE is Code memory size, and CODEPAGESIZE is Code memory page size.

On the nRF52840, the flash memory contains 256 pages of 1024 bytes each. That's why CODESIZE is 0x00000100 (256 pages) and CODEPAGESIZE is 0x00001000 (1024 bytes).

2. I get it the last address on the last page is equal to UICR.NRFFW[0]. But why every value of NRFFW is 0xffffffff? Is there other meaning that I didnt find?

Similar to the registers above, you can find the NRFFW registers documented in the UICR documentation page. They are registers reserved for Nordic's software usages.

However, I don't think it store the last address of the last page, whether we are talking about the fstorage reserved area, or the entire flash memory. Why did you think that is the case.

I see that NRFFW[0] can store the last address of the last page of the fstorage area when you use a bootloader, and set the fstorage area to end at the address right before the bootloader starts.

The fact that NRFFW[0] have the last fstorage address is just a coincidence then. NRFFW[0] store the bootloader's start address in our bootloader solution. 

Also, technically, the last fstorage byte address should be (NRFFW[0] - 1) in this case.

In this scenario, NRFFW[1] should not be 0xFFFFFFFF though. Refer to the Bootloader documentation linked above and see that it should store the start address of MBR Parameters.

As for why the other NRFFW registers all have the value 0xFFFFFFFF, it is simply because that is the default value of the registers after an erase.

Hieu