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devicetree error: 'pinctrl-0' is marked as required in 'properties:' in C:/ncs/v2.5.2/zephyr/dts/bindings\serial\nordic,nrf-uarte.yaml

Sergnrf

Hi,
I'm trying to port the acconeer project that worked on the old one ncs 2.2.0  to new ncs 2.5.2  and ran into a problem with the difference in the DeviceTree description

-- Found devicetree overlay: c:/Work/new/boards/shields/acconeer_xb122/acconeer_xb122.overlay
devicetree error: 'pinctrl-0' is marked as required in 'properties:' in C:/ncs/v2.5.2/zephyr/dts/bindings\serial\nordic,nrf-uarte.yaml, but does not appear in <Node /soc/uart@40002000 in 'C:/ncs/v2.5.2/zephyr/misc/empty_file.c'>


/*
 * Copyright (c) 2022 Acconeer AB
 *
 * SPDX-License-Identifier: BSD-3-Clause
 */

/dts-v1/;
#include <nordic/nrf52840_qiaa.dtsi>

/ {
	model = "Acconeer XM122";
	compatible = "acc,xm122";

	chosen {
		zephyr,console = &uart0;
		zephyr,shell-uart = &uart0;
		zephyr,uart-mcumgr = &uart0;
		zephyr,bt-mon-uart = &uart0;
		zephyr,bt-c2h-uart = &uart0;
		zephyr,sram = &sram0;
		zephyr,flash = &flash0;
		zephyr,code-partition = &slot0_partition;
		zephyr,ieee802154 = &ieee802154;
	};

	leds {
		compatible = "gpio-leds";
		led0: led_0 {
			gpios = <&gpio1 11 GPIO_ACTIVE_LOW>;
			label = "XM122 LED";
		};
	};

	/* These aliases are provided for compatibility with samples */
	aliases {
		led0 = &led0;
	};
};

&adc {
	status = "okay";
};

&gpiote {
	status = "okay";
};

&gpio0 {
	status = "okay";
};

&gpio1 {
	status = "okay";
};

&uart0 {
	compatible = "nordic,nrf-uarte";
	status = "okay";
	current-speed = <115200>;
	tx-pin = <16>;
	rx-pin = <6>;
	rx-pull-up;
	rts-pin = <20>;
	cts-pin = <19>;
	cts-pull-up;

};

&i2c1 {
	compatible = "nordic,nrf-twi";
	status = "okay";
	sda-pin = <26>;
	scl-pin = <27>;
};

&spi0 {
	compatible = "nordic,nrf-spi";
	status = "okay";
	sck-pin = <27>;
	mosi-pin = <40>;
	miso-pin = <5>;

	cs-gpios = <&gpio0 26 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;

	a111@0 {
		compatible = "acc,a111";
		reg = <0x0>;
		spi-max-frequency = <32000000>;

		irq-gpios = <&gpio0 8 GPIO_ACTIVE_HIGH>;
		ctrl-gpios = <&gpio0 13 GPIO_ACTIVE_HIGH>;
		enable-gpios = <&gpio0 15 GPIO_ACTIVE_HIGH>;
		ps-enable-gpios = <&gpio0 14 GPIO_ACTIVE_HIGH>;

		board-ref-freq = <24000000>;
		ps-enable-time = <300>;
		sensor-stab-time = <2000>;

		status = "okay";
	};
};

&ieee802154 {
	status = "okay";
};

&flash0 {

	partitions {
		compatible = "fixed-partitions";
		#address-cells = <1>;
		#size-cells = <1>;

		boot_partition: partition@0 {
			label = "mcuboot";
			reg = <0x00000000 0x0000C000>;
		};
		slot0_partition: partition@c000 {
			label = "image-0";
			reg = <0x0000C000 0x00067000>;
		};
		slot1_partition: partition@73000 {
			label = "image-1";
			reg = <0x00073000 0x00067000>;
		};
		scratch_partition: partition@da000 {
			label = "image-scratch";
			reg = <0x000da000 0x0001e000>;
		};

		/*
		 * The flash starting at 0x000f8000 and ending at
		 * 0x000fffff is reserved for use by the application.
		 */

		/*
		 * Storage partition will be used by FCB/LittleFS/NVS
		 * if enabled.
		 */
		storage_partition: partition@f8000 {
			label = "storage";
			reg = <0x000f8000 0x00008000>;
		};
	};
};

/ {
	vbatt {
	   compatible = "voltage-divider";
	   io-channels = <&adc 0>;
	   output-ohms = <180000>;
	   full-ohms = <(360000 + 180000)>;
	   power-gpios = <&gpio0 17 GPIO_ACTIVE_HIGH>;
	};
 };

Parents
  • +1

    Hi,

     

    This section:

    / {
	vbatt {
	   compatible = "voltage-divider";
	   io-channels = <&adc 0>;
	   output-ohms = <180000>;
	   full-ohms = <(360000 + 180000)>;
	   power-gpios = <&gpio0 17 GPIO_ACTIVE_HIGH>;
	};
 };

    Should be moved into the section starting from line 10-38.

    All your peripherals are setup without pinctrl, meaning that we need to migrate your current solution.

     

    Fortunately, there's a script for this already present in zephyr:

    https://github.com/zephyrproject-rtos/zephyr/blob/main/scripts/utils/pinctrl_nrf_migrate.py

    python pinctrl_nrf_migrate.py -i my_file.dts

    This will create a "my_file.dts" and "my_file-pinctrl.dtsi". Here's the converted files:

    /*
 * Copyright (c) 2022 Acconeer AB
 *
 * SPDX-License-Identifier: BSD-3-Clause
 */

/dts-v1/;
#include <nordic/nrf52840_qiaa.dtsi>
#include "my_file-pinctrl.dtsi"

/ {
	model = "Acconeer XM122";
	compatible = "acc,xm122";

	chosen {
		zephyr,console = &uart0;
		zephyr,shell-uart = &uart0;
		zephyr,uart-mcumgr = &uart0;
		zephyr,bt-mon-uart = &uart0;
		zephyr,bt-c2h-uart = &uart0;
		zephyr,sram = &sram0;
		zephyr,flash = &flash0;
		zephyr,code-partition = &slot0_partition;
		zephyr,ieee802154 = &ieee802154;
	};

	leds {
		compatible = "gpio-leds";
		led0: led_0 {
			gpios = <&gpio1 11 GPIO_ACTIVE_LOW>;
			label = "XM122 LED";
		};
	};

	/* These aliases are provided for compatibility with samples */
	aliases {
		led0 = &led0;
	};

        vbatt {
           compatible = "voltage-divider";
           io-channels = <&adc 0>;
           output-ohms = <180000>;
           full-ohms = <(360000 + 180000)>;
           power-gpios = <&gpio0 17 GPIO_ACTIVE_HIGH>;
        };
};

&adc {
	status = "okay";
};

&gpiote {
	status = "okay";
};

&gpio0 {
	status = "okay";
};

&gpio1 {
	status = "okay";
};

&uart0 {
	compatible = "nordic,nrf-uarte";
	status = "okay";
	current-speed = <115200>;

	pinctrl-0 = <&uart0_default>;
	pinctrl-1 = <&uart0_sleep>;
	pinctrl-names = "default", "sleep";
};

&i2c1 {
	compatible = "nordic,nrf-twi";
	status = "okay";
	pinctrl-0 = <&i2c1_default>;
	pinctrl-1 = <&i2c1_sleep>;
	pinctrl-names = "default", "sleep";
};

&spi0 {
	compatible = "nordic,nrf-spi";
	status = "okay";

	cs-gpios = <&gpio0 26 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;

	pinctrl-0 = <&spi0_default>;
	pinctrl-1 = <&spi0_sleep>;
	pinctrl-names = "default", "sleep";
	a111@0 {
		compatible = "acc,a111";
		reg = <0x0>;
		spi-max-frequency = <32000000>;

		irq-gpios = <&gpio0 8 GPIO_ACTIVE_HIGH>;
		ctrl-gpios = <&gpio0 13 GPIO_ACTIVE_HIGH>;
		enable-gpios = <&gpio0 15 GPIO_ACTIVE_HIGH>;
		ps-enable-gpios = <&gpio0 14 GPIO_ACTIVE_HIGH>;

		board-ref-freq = <24000000>;
		ps-enable-time = <300>;
		sensor-stab-time = <2000>;

		status = "okay";
	};
};

&ieee802154 {
	status = "okay";
};

&flash0 {

	partitions {
		compatible = "fixed-partitions";
		#address-cells = <1>;
		#size-cells = <1>;

		boot_partition: partition@0 {
			label = "mcuboot";
			reg = <0x00000000 0x0000C000>;
		};
		slot0_partition: partition@c000 {
			label = "image-0";
			reg = <0x0000C000 0x00067000>;
		};
		slot1_partition: partition@73000 {
			label = "image-1";
			reg = <0x00073000 0x00067000>;
		};
		scratch_partition: partition@da000 {
			label = "image-scratch";
			reg = <0x000da000 0x0001e000>;
		};

		/*
		 * The flash starting at 0x000f8000 and ending at
		 * 0x000fffff is reserved for use by the application.
		 */

		/*
		 * Storage partition will be used by FCB/LittleFS/NVS
		 * if enabled.
		 */
		storage_partition: partition@f8000 {
			label = "storage";
			reg = <0x000f8000 0x00008000>;
		};
	};
};

     

    &pinctrl {
	uart0_default: uart0_default {
		group1 {
			psels = <NRF_PSEL(UART_TX, 0, 16)>,
				<NRF_PSEL(UART_RTS, 0, 20)>;
		};
		group2 {
			psels = <NRF_PSEL(UART_RX, 0, 6)>,
				<NRF_PSEL(UART_CTS, 0, 19)>;
			bias-pull-up;
		};
	};

	uart0_sleep: uart0_sleep {
		group1 {
			psels = <NRF_PSEL(UART_TX, 0, 16)>,
				<NRF_PSEL(UART_RX, 0, 6)>,
				<NRF_PSEL(UART_RTS, 0, 20)>,
				<NRF_PSEL(UART_CTS, 0, 19)>;
			low-power-enable;
		};
	};

	i2c1_default: i2c1_default {
		group1 {
			psels = <NRF_PSEL(TWIM_SDA, 0, 26)>,
				<NRF_PSEL(TWIM_SCL, 0, 27)>;
		};
	};

	i2c1_sleep: i2c1_sleep {
		group1 {
			psels = <NRF_PSEL(TWIM_SDA, 0, 26)>,
				<NRF_PSEL(TWIM_SCL, 0, 27)>;
			low-power-enable;
		};
	};

	spi0_default: spi0_default {
		group1 {
			psels = <NRF_PSEL(SPIM_SCK, 0, 27)>,
				<NRF_PSEL(SPIM_MOSI, 1, 8)>,
				<NRF_PSEL(SPIM_MISO, 0, 5)>;
		};
	};

	spi0_sleep: spi0_sleep {
		group1 {
			psels = <NRF_PSEL(SPIM_SCK, 0, 27)>,
				<NRF_PSEL(SPIM_MOSI, 1, 8)>,
				<NRF_PSEL(SPIM_MISO, 0, 5)>;
			low-power-enable;
		};
	};

};

     

    Could you try these and report back?

     

    Kind regards,

    Håkon

Reply
  • +1

    Hi,

     

    This section:

    / {
	vbatt {
	   compatible = "voltage-divider";
	   io-channels = <&adc 0>;
	   output-ohms = <180000>;
	   full-ohms = <(360000 + 180000)>;
	   power-gpios = <&gpio0 17 GPIO_ACTIVE_HIGH>;
	};
 };

    Should be moved into the section starting from line 10-38.

    All your peripherals are setup without pinctrl, meaning that we need to migrate your current solution.

     

    Fortunately, there's a script for this already present in zephyr:

    https://github.com/zephyrproject-rtos/zephyr/blob/main/scripts/utils/pinctrl_nrf_migrate.py

    python pinctrl_nrf_migrate.py -i my_file.dts

    This will create a "my_file.dts" and "my_file-pinctrl.dtsi". Here's the converted files:

    /*
 * Copyright (c) 2022 Acconeer AB
 *
 * SPDX-License-Identifier: BSD-3-Clause
 */

/dts-v1/;
#include <nordic/nrf52840_qiaa.dtsi>
#include "my_file-pinctrl.dtsi"

/ {
	model = "Acconeer XM122";
	compatible = "acc,xm122";

	chosen {
		zephyr,console = &uart0;
		zephyr,shell-uart = &uart0;
		zephyr,uart-mcumgr = &uart0;
		zephyr,bt-mon-uart = &uart0;
		zephyr,bt-c2h-uart = &uart0;
		zephyr,sram = &sram0;
		zephyr,flash = &flash0;
		zephyr,code-partition = &slot0_partition;
		zephyr,ieee802154 = &ieee802154;
	};

	leds {
		compatible = "gpio-leds";
		led0: led_0 {
			gpios = <&gpio1 11 GPIO_ACTIVE_LOW>;
			label = "XM122 LED";
		};
	};

	/* These aliases are provided for compatibility with samples */
	aliases {
		led0 = &led0;
	};

        vbatt {
           compatible = "voltage-divider";
           io-channels = <&adc 0>;
           output-ohms = <180000>;
           full-ohms = <(360000 + 180000)>;
           power-gpios = <&gpio0 17 GPIO_ACTIVE_HIGH>;
        };
};

&adc {
	status = "okay";
};

&gpiote {
	status = "okay";
};

&gpio0 {
	status = "okay";
};

&gpio1 {
	status = "okay";
};

&uart0 {
	compatible = "nordic,nrf-uarte";
	status = "okay";
	current-speed = <115200>;

	pinctrl-0 = <&uart0_default>;
	pinctrl-1 = <&uart0_sleep>;
	pinctrl-names = "default", "sleep";
};

&i2c1 {
	compatible = "nordic,nrf-twi";
	status = "okay";
	pinctrl-0 = <&i2c1_default>;
	pinctrl-1 = <&i2c1_sleep>;
	pinctrl-names = "default", "sleep";
};

&spi0 {
	compatible = "nordic,nrf-spi";
	status = "okay";

	cs-gpios = <&gpio0 26 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;

	pinctrl-0 = <&spi0_default>;
	pinctrl-1 = <&spi0_sleep>;
	pinctrl-names = "default", "sleep";
	a111@0 {
		compatible = "acc,a111";
		reg = <0x0>;
		spi-max-frequency = <32000000>;

		irq-gpios = <&gpio0 8 GPIO_ACTIVE_HIGH>;
		ctrl-gpios = <&gpio0 13 GPIO_ACTIVE_HIGH>;
		enable-gpios = <&gpio0 15 GPIO_ACTIVE_HIGH>;
		ps-enable-gpios = <&gpio0 14 GPIO_ACTIVE_HIGH>;

		board-ref-freq = <24000000>;
		ps-enable-time = <300>;
		sensor-stab-time = <2000>;

		status = "okay";
	};
};

&ieee802154 {
	status = "okay";
};

&flash0 {

	partitions {
		compatible = "fixed-partitions";
		#address-cells = <1>;
		#size-cells = <1>;

		boot_partition: partition@0 {
			label = "mcuboot";
			reg = <0x00000000 0x0000C000>;
		};
		slot0_partition: partition@c000 {
			label = "image-0";
			reg = <0x0000C000 0x00067000>;
		};
		slot1_partition: partition@73000 {
			label = "image-1";
			reg = <0x00073000 0x00067000>;
		};
		scratch_partition: partition@da000 {
			label = "image-scratch";
			reg = <0x000da000 0x0001e000>;
		};

		/*
		 * The flash starting at 0x000f8000 and ending at
		 * 0x000fffff is reserved for use by the application.
		 */

		/*
		 * Storage partition will be used by FCB/LittleFS/NVS
		 * if enabled.
		 */
		storage_partition: partition@f8000 {
			label = "storage";
			reg = <0x000f8000 0x00008000>;
		};
	};
};

     

    &pinctrl {
	uart0_default: uart0_default {
		group1 {
			psels = <NRF_PSEL(UART_TX, 0, 16)>,
				<NRF_PSEL(UART_RTS, 0, 20)>;
		};
		group2 {
			psels = <NRF_PSEL(UART_RX, 0, 6)>,
				<NRF_PSEL(UART_CTS, 0, 19)>;
			bias-pull-up;
		};
	};

	uart0_sleep: uart0_sleep {
		group1 {
			psels = <NRF_PSEL(UART_TX, 0, 16)>,
				<NRF_PSEL(UART_RX, 0, 6)>,
				<NRF_PSEL(UART_RTS, 0, 20)>,
				<NRF_PSEL(UART_CTS, 0, 19)>;
			low-power-enable;
		};
	};

	i2c1_default: i2c1_default {
		group1 {
			psels = <NRF_PSEL(TWIM_SDA, 0, 26)>,
				<NRF_PSEL(TWIM_SCL, 0, 27)>;
		};
	};

	i2c1_sleep: i2c1_sleep {
		group1 {
			psels = <NRF_PSEL(TWIM_SDA, 0, 26)>,
				<NRF_PSEL(TWIM_SCL, 0, 27)>;
			low-power-enable;
		};
	};

	spi0_default: spi0_default {
		group1 {
			psels = <NRF_PSEL(SPIM_SCK, 0, 27)>,
				<NRF_PSEL(SPIM_MOSI, 1, 8)>,
				<NRF_PSEL(SPIM_MISO, 0, 5)>;
		};
	};

	spi0_sleep: spi0_sleep {
		group1 {
			psels = <NRF_PSEL(SPIM_SCK, 0, 27)>,
				<NRF_PSEL(SPIM_MOSI, 1, 8)>,
				<NRF_PSEL(SPIM_MISO, 0, 5)>;
			low-power-enable;
		};
	};

};

     

    Could you try these and report back?

     

    Kind regards,

    Håkon

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