Hi
I want to know why flash memory access should be scheduled in between the protocol radio event? is there any relation between the flash access and radio opeartion physically ?
thanks
Hi
I want to know why flash memory access should be scheduled in between the protocol radio event? is there any relation between the flash access and radio opeartion physically ?
thanks
Some processing from the CPU is required to handle the radio events, but not much. The problem with that is that the CPU is halted during flash operations, see NVMC chapter in the reference manual. So the problem is not the radio itself, but the availability of the CPU.
pstorage functions can be called at any time. Pstorage and the SD flash api will make sure that the flash operations are performed between radio events.
pstorage functions can be called at any time. Pstorage and the SD flash api will make sure that the flash operations are performed between radio events.