Hi
I want to know why flash memory access should be scheduled in between the protocol radio event? is there any relation between the flash access and radio opeartion physically ?
thanks
Hi
I want to know why flash memory access should be scheduled in between the protocol radio event? is there any relation between the flash access and radio opeartion physically ?
thanks
Some processing from the CPU is required to handle the radio events, but not much. The problem with that is that the CPU is halted during flash operations, see NVMC chapter in the reference manual. So the problem is not the radio itself, but the availability of the CPU.
Some processing from the CPU is required to handle the radio events, but not much. The problem with that is that the CPU is halted during flash operations, see NVMC chapter in the reference manual. So the problem is not the radio itself, but the availability of the CPU.
ok thanks...
But the description of NVMC chapter says that CPU is halted when CPU tries to fetch the CODE/DATA from flash only. that is, if CPU tries to fetch the CODE/DATA from RAM, it says there is no halt.
is it right?
if then, is the flash acccess in radio operation only restricted when CPU is using the flash for fetching CODE/DATA ?
thanks
Hi, Berg
I have some question about it.
Does this mean I can't call pstorage_store any time, when the BLE is work? If I called it, the BLE connection may be lost, right?
How could I do if my BLE-sensor product need to real-time restore the data when BLE connection works? Need I disconnect the connection, then save to flash, then automatically reconnection it? But out purpose to set the transter interval is 1s, you said the save time should be more than 1s up-to 10s, right?
pstorage functions can be called at any time. Pstorage and the SD flash api will make sure that the flash operations are performed between radio events.