FLASH overflow issue + nrf5340 + DFU external flash

[Lavanya_Manohar]

Hi, 

Working with the NRF5340-nrf7002 and the W25Q16RV flash memory in our project. 

• Initially, I configured an 8MB(W25Q64RV) external flash without issues and tested DFU-FOTA which is working as expected. However, after switching to the 2MB W25Q16RV flash, I’ve encountered a flash memory overflow.

• When configuring the project to use the 2MB W25Q16RV flash, the linker reports a FLASH region overflowed by 736 bytes:

Here I share build i suspect

CMake Warning at C:/ncs/v2.6.1/nrf/modules/mcuboot/CMakeLists.txt:382 (message):
            ---------------------------------------------------------
          --- WARNING: Using default MCUBoot key, it should not ---
          --- be used for production.                           ---
          ---------------------------------------------------------
      CMake Warning at C:/ncs/v2.6.1/nrf/cmake/partition_manager.cmake:79 (message):
            ---------------------------------------------------------------------
          --- WARNING: Using a bootloader without pm_static.yml.            ---
          --- There are cases where a deployed product can consist of       ---
          --- multiple images, and only a subset of these images can be     ---
          --- upgraded through a firmware update mechanism. In such cases,  ---
          --- the upgradable images must have partitions that are static    ---
          --- and are matching the partition map used by the bootloader     ---
          --- programmed onto the device.                                   ---
          ---------------------------------------------------------------------
        Call Stack (most recent call first):
  C:/ncs/v2.6.1/zephyr/cmake/modules/kernel.cmake:248 (include)
  C:/ncs/v2.6.1/zephyr/cmake/modules/zephyr_default.cmake:138 (include)
  C:/ncs/v2.6.1/zephyr/share/zephyr-package/cmake/ZephyrConfig.cmake:66 (include)
  C:/ncs/v2.6.1/zephyr/share/zephyr-package/cmake/ZephyrConfig.cmake:92 (include_boilerplate)
  CMakeLists.txt:9 (find_package)
Dropping partition 'nvs_storage' since its size is 0.
Dropping partition 'nonsecure_storage' since it is empty.
CMake Warning at C:/ncs/v2.6.1/nrf/cmake/partition_manager.cmake:601 (message):
  Could not find memory mapped address for XIP.  Generated update hex files
  will not have the correct base address.  Hence they can not be programmed
  directly to the external flash
Call Stack (most recent call first):
  C:/ncs/v2.6.1/zephyr/cmake/modules/kernel.cmake:248 (include)
  C:/ncs/v2.6.1/zephyr/cmake/modules/zephyr_default.cmake:138 (include)
  C:/ncs/v2.6.1/zephyr/share/zephyr-package/cmake/ZephyrConfig.cmake:66 (include)
  C:/ncs/v2.6.1/zephyr/share/zephyr-package/cmake/ZephyrConfig.cmake:92 (include_boilerplate)
  CMakeLists.txt:9 (find_package)

c:/ncs/toolchains/cf2149caf2/opt/zephyr-sdk/arm-zephyr-eabi/bin/../lib/gcc/arm-zephyr-eabi/12.2.0/../../../../arm-zephyr-eabi/bin/ld.bfd.exe: zephyr\zephyr_pre0.elf section `rodata' will not fit in region `FLASH'
c:/ncs/toolchains/cf2149caf2/opt/zephyr-sdk/arm-zephyr-eabi/bin/../lib/gcc/arm-zephyr-eabi/12.2.0/../../../../arm-zephyr-eabi/bin/ld.bfd.exe: region `FLASH' overflowed by 736 bytes

• The project works fine with an 8MB flash, but not with the 2MB flash, even though the external flash is only used for FOTA image downloads.
• I need guidance on whether this overflow issue is due to the flash configuration or another underlying cause.
• Could you please provide insights on the correct configuration for the W25Q16RV flash to resolve the overflow issue?
• Any recommendations or adjustments to ensure the 2MB flash works without overflow.

[Amanda Hsieh]

Hi, 

You can check the settings for 2MB flash to ensure the settings are correct.  I think the configs should be the same and only the overlay is different. (Maybe my understanding of your flash is wrong.) If everything is correct, maybe the 2MB flash is not big enough for the updated image. Since mcuboot_secondary should be the same size of mcuboot_primary, the size of the application might not be compatible with mcuboot_primary/ mcuboot_secondary. Then, You can try to reduce the size of the application. See Memory footprint optimization. 

Here I share build i suspect

Guess your flash is connected via SPI, so you would see that message. See this post.

Regards,
Amanda H.

[Lavanya_Manohar]

Hi Amanda,
Thank you for your response.

Amanda Hsieh said:

maybe the 2MB flash is not big enough for the updated image.

We also suspect this. Therefore we tried 4MB W25Q32RV external flash, facing same issue.

My overlay

// Update chosen node to use w25q32jv as external flash memory
/ {
	chosen {
		nordic,pm-ext-flash = &w25q32jv;
	};
};

// Disable mx25r64
&mx25r64 {
	status = "disabled";
};

// Enable and configure SPI with W25Q32JV flash memory
&spi4 {
    compatible = "nordic,nrf-spim";
    status = "okay";
    pinctrl-0 = <&spi4_default>;
    pinctrl-1 = <&spi4_sleep>;
    pinctrl-names = "default", "sleep";
    cs-gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
    w25q32jv: w25q32jv@0 {
        compatible = "jedec,spi-nor";
        reg = <0>;
        spi-max-frequency = <133000000>; // 133 MHz
        jedec-id = [ef 40 16]; // Manufacturer and device ID for W25Q32JV
        sfdp-bfp = [
            e5 20 f1 ff ff ff ff 03 44 eb 08 6b 08 3b 04
            bb ee ff ff ff ff ff 00 ff ff ff 00 ff 0c 20
            0f 52 10 d8 00 ff 23 72 f5 00 82 ed 04 cc 44
            83 68 44 30 b0 30 b0 f7 c4 d5 5c 00 be 29 ff
            f0 d0 ff ff
        ];
        size = <0x400000>;  // 4 MiB
        has-dpd;
        t-enter-dpd = <10000>;  // 10 µs (10000 ns)
        t-exit-dpd = <30000>;   // 30 µs (30000 ns)
    };
};

&spi4_default {
    group1 {
        psels = <NRF_PSEL(SPIM_SCK, 0, 8)>,   // P0.08
                <NRF_PSEL(SPIM_MISO, 0, 10)>, // P0.10
                <NRF_PSEL(SPIM_MOSI, 0, 9)>;  // P0.09
    };
};

&spi4_sleep {
    group1 {
        psels = <NRF_PSEL(SPIM_SCK, 0, 8)>,   // P0.08
                <NRF_PSEL(SPIM_MISO, 0, 10)>, // P0.10
                <NRF_PSEL(SPIM_MOSI, 0, 9)>;  // P0.09
        low-power-enable;
    };
};

build/zephyr/partition.yml file

EMPTY_0:
  address: 0xfa000
  end_address: 0xfc000
  placement:
    after:
    - tfm_otp_nv_counters
  region: flash_primary
  size: 0x2000
EMPTY_1:
  address: 0xf6000
  end_address: 0xf8000
  placement:
    after:
    - tfm_its
  region: flash_primary
  size: 0x2000
app:
  address: 0x30000
  end_address: 0xf4000
  region: flash_primary
  size: 0xc4000
external_flash:
  address: 0xe4000
  end_address: 0x80000
  region: external_flash
  size: -0x64000
mcuboot:
  address: 0x0
  end_address: 0x10000
  placement:
    before:
    - mcuboot_primary
  region: flash_primary
  size: 0x10000
mcuboot_pad:
  address: 0x10000
  end_address: 0x10200
  placement:
    before:
    - mcuboot_primary_app
  region: flash_primary
  size: 0x200
mcuboot_primary:
  address: 0x10000
  end_address: 0xf4000
  orig_span: &id001
  - tfm
  - app
  - mcuboot_pad
  region: flash_primary
  size: 0xe4000
  span: *id001
mcuboot_primary_app:
  address: 0x10200
  end_address: 0xf4000
  orig_span: &id002
  - app
  - tfm
  region: flash_primary
  size: 0xe3e00
  span: *id002
mcuboot_secondary:
  address: 0x0
  device: DT_CHOSEN(nordic_pm_ext_flash)
  end_address: 0xe4000
  placement:
    align:
      start: 0x4
  region: external_flash
  share_size:
  - mcuboot_primary
  size: 0xe4000
mcuboot_sram:
  address: 0x20000000
  end_address: 0x20080000
  orig_span: &id003
  - sram_primary
  - rpmsg_nrf53_sram
  - tfm_sram
  region: sram_primary
  size: 0x80000
  span: *id003
otp:
  address: 0xff8100
  end_address: 0xff83fc
  region: otp
  size: 0x2fc
rpmsg_nrf53_sram:
  address: 0x20070000
  end_address: 0x20080000
  placement:
    before:
    - end
  region: sram_primary
  size: 0x10000
sram_nonsecure:
  address: 0x2000c000
  end_address: 0x20080000
  orig_span: &id004
  - sram_primary
  - rpmsg_nrf53_sram
  region: sram_primary
  size: 0x74000
  span: *id004
sram_primary:
  address: 0x2000c000
  end_address: 0x20070000
  region: sram_primary
  size: 0x64000
sram_secure:
  address: 0x20000000
  end_address: 0x2000c000
  orig_span: &id005
  - tfm_sram
  region: sram_primary
  size: 0xc000
  span: *id005
tfm:
  address: 0x10200
  end_address: 0x30000
  inside:
  - mcuboot_primary_app
  placement:
    before:
    - app
  region: flash_primary
  size: 0x1fe00
tfm_its:
  address: 0xf4000
  end_address: 0xf6000
  inside:
  - tfm_storage
  placement:
    align:
      start: 0x4000
    before:
    - tfm_otp_nv_counters
  region: flash_primary
  size: 0x2000
tfm_nonsecure:
  address: 0x30000
  end_address: 0xf4000
  orig_span: &id006
  - app
  region: flash_primary
  size: 0xc4000
  span: *id006
tfm_otp_nv_counters:
  address: 0xf8000
  end_address: 0xfa000
  inside:
  - tfm_storage
  placement:
    align:
      start: 0x4000
    before:
    - tfm_ps
  region: flash_primary
  size: 0x2000
tfm_ps:
  address: 0xfc000
  end_address: 0x100000
  inside:
  - tfm_storage
  placement:
    align:
      start: 0x4000
    before:
    - end
  region: flash_primary
  size: 0x4000
tfm_secure:
  address: 0x10000
  end_address: 0x30000
  orig_span: &id007
  - mcuboot_pad
  - tfm
  region: flash_primary
  size: 0x20000
  span: *id007
tfm_sram:
  address: 0x20000000
  end_address: 0x2000c000
  inside:
  - sram_secure
  placement:
    after:
    - start
  region: sram_primary
  size: 0xc000
tfm_storage:
  address: 0xf4000
  end_address: 0x100000
  orig_span: &id008
  - tfm_ps
  - tfm_its
  - tfm_otp_nv_counters
  region: flash_primary
  size: 0xc000
  span: *id008

Amanda Hsieh said:

You can check the settings for 2MB flash to ensure the settings are correct. 

I have check external flash using zephyr/sample/driver/spi_flash_at45. Both 2MB and 4MB are working fine.

Any other configuration need to check?

[Lavanya_Manohar]

Hi Amanda,

After modifying the external flash configuration (sfdp-bfp) and commenting out CONFIG_SPI_NOR_SFDP_DEVICETREE=y, I was able to compile the project without overflow issues. However, I'm encountering an issue related to sector counts in both 2MB and 4MB configurations.

Observed Issue:

*** Booting nRF Connect SDK v3.5.99-ncs1-1 ***
I: Starting bootloader
W: Cannot upgrade: not a compatible amount of sectors
I: Bootloader chainload address offset: 0x10000
I: Jumping to the first image slot

[00:00:00.011,749] <inf> spi_nor: w25q32jv@0: 4 MiBy flash
[00:00:00.011,779] <err> spi_nor: BFP flash size mismatch with devicetree
[00:00:00.011,779] <err> spi_nor: SFDP read failed: -22
*** Booting nRF Connect SDK v3.5.99-ncs1-1 ***
Download client sample started
HTTP application update sample started
Using version 2
if up
Connecting to network

While debuging found that inccompatible number of sectors.

• Primary Flash (1MB): 228 sectors detected
• Secondary Flash (4MB): 128 sectors detected

...

1. What are the bootloader settings, especially regarding the flash size and sector layout?
2.The number of sectors is typically determined by the total flash size divided by the sector size. How to set these configuration for 2MB or 4MB flash?

[Lavanya_Manohar]

[Amanda Hsieh]

Are you using the static partition? If so, it seems the size of the primary slot and the second slot are not equal. You can remove the static partition and let the partition manager general the partition automatically and then use that partition.yaml as the static partition.  

[Lavanya_Manohar]

Hi Amanda,

Amanda Hsieh said:

Are you using the static partition?

No, I'm not using the static partition. The partiton.yml which I have attached is automatically generated partition only.

[Lavanya_Manohar]

Hi,

Here I share the conf and overlay files.

board/nrf7002dk_nrf5340_cpuapp_ns.conf

# General
CONFIG_POSIX_CLOCK=y
CONFIG_SYSTEM_WORKQUEUE_STACK_SIZE=4096
CONFIG_LOG_BUFFER_SIZE=3072
CONFIG_HEAP_MEM_POOL_SIZE=81920
CONFIG_MAIN_STACK_SIZE=4096
CONFIG_LOG=y

CONFIG_HW_STACK_PROTECTION=y
# CONFIG_HW_ID_LIBRARY_SOURCE_NET_MAC=y

# Optimize Wi-Fi stack to save some memory
CONFIG_NRF700X_RX_NUM_BUFS=16
CONFIG_NRF700X_MAX_TX_AGGREGATION=4

# Zephyr NET Connection Manager connectivity layer.
CONFIG_L2_WIFI_CONNECTIVITY=y
CONFIG_L2_WIFI_CONNECTIVITY_AUTO_DOWN=n
CONFIG_L2_WIFI_CONNECTIVITY_AUTO_CONNECT=n

# Wi-Fi
CONFIG_WIFI=y
CONFIG_WIFI_NRF700X=y
CONFIG_WIFI_NRF700X_LOG_LEVEL_ERR=y
CONFIG_WIFI_MGMT_EXT=y
CONFIG_WIFI_CREDENTIALS=y

# Shell
CONFIG_SHELL=y
CONFIG_SHELL_STACK_SIZE=6144

# WPA
CONFIG_WPA_SUPP=y
CONFIG_WPA_SUPP_LOG_LEVEL_ERR=y

# NET sockets
CONFIG_NET_L2_ETHERNET=y
CONFIG_NET_TCP_WORKQ_STACK_SIZE=2048
CONFIG_NET_UDP=y
CONFIG_NET_DHCPV4=y
CONFIG_NET_DHCPV6=y
CONFIG_NET_CONTEXT_SNDTIMEO=y
CONFIG_NET_CONTEXT_RCVTIMEO=y
CONFIG_NET_TCP=y
CONFIG_NET_NATIVE=y
CONFIG_NET_SOCKETS_SOCKOPT_TLS=y

# DNS
CONFIG_DNS_RESOLVER=y
CONFIG_NET_SOCKETS_DNS_TIMEOUT=30000

# TLS
CONFIG_NRF_SECURITY=y
CONFIG_MBEDTLS=y
CONFIG_MBEDTLS_TLS_LIBRARY=y
CONFIG_MBEDTLS_ENABLE_HEAP=y
CONFIG_MBEDTLS_HEAP_SIZE=81920
CONFIG_MBEDTLS_RSA_C=y
CONFIG_MBEDTLS_SSL_SERVER_NAME_INDICATION=y
CONFIG_TLS_CREDENTIALS_BACKEND_PROTECTED_STORAGE=y

# Optimize TF-M
CONFIG_TFM_PROFILE_TYPE_SMALL=y
CONFIG_PM_PARTITION_SIZE_TFM_SRAM=0xc000
CONFIG_PM_PARTITION_SIZE_TFM=0x1fe00

# CONFIG_PM_PARTITION_SIZE_TFM=0x20000

CONFIG_FLASH=y
CONFIG_FLASH_PAGE_LAYOUT=y
CONFIG_FLASH_MAP=y

# Serial Peripheral Interface (SPI)
CONFIG_SPI=y
CONFIG_SPI_NOR=y
# CONFIG_SPI_NOR_SFDP_DEVICETREE=y
CONFIG_SPI_NOR_FLASH_LAYOUT_PAGE_SIZE=4096

# Bootloader and FOTA related configurations

# MCUBOOT
CONFIG_BOOTLOADER_MCUBOOT=y
CONFIG_MCUBOOT_USE_ALL_AVAILABLE_RAM=y
CONFIG_MCUBOOT_IMG_MANAGER=y
CONFIG_PM_OVERRIDE_EXTERNAL_DRIVER_CHECK=y

# Image manager
CONFIG_IMG_MANAGER=y
CONFIG_STREAM_FLASH=y
CONFIG_IMG_ERASE_PROGRESSIVELY=y

# Download client (needed by AWS FOTA)
CONFIG_DOWNLOAD_CLIENT=y
CONFIG_DOWNLOAD_CLIENT_STACK_SIZE=4096
CONFIG_DOWNLOAD_CLIENT_BUF_SIZE=4096
CONFIG_DOWNLOAD_CLIENT_HTTP_FRAG_SIZE_4096=y

proj.conf

CONFIG_DOWNLOAD_CLIENT=y
CONFIG_DOWNLOAD_CLIENT_STACK_SIZE=4096

# Networking
CONFIG_NETWORKING=y
CONFIG_NET_CONNECTION_MANAGER=y
CONFIG_NET_SOCKETS=y
CONFIG_NET_SOCKETS_POSIX_NAMES=y
CONFIG_NET_IPV4=y
CONFIG_NET_IPV6=y
# CONFIG_HEAP_MEM_POOL_SIZE=1024

CONFIG_FW_INFO=y

# FOTA library
CONFIG_FOTA_DOWNLOAD=y

# Application Upgrade support
CONFIG_BOOTLOADER_MCUBOOT=y

# DFU Target
CONFIG_DFU_TARGET=y

# HTTP
CONFIG_HTTP_PARSER=y
CONFIG_HTTP_PARSER_URL=y

# Image manager
CONFIG_IMG_MANAGER=y
CONFIG_FLASH=y
CONFIG_FLASH_MAP=y
CONFIG_STREAM_FLASH=y
CONFIG_IMG_ERASE_PROGRESSIVELY=y

# Non-volatile Storage
CONFIG_NVS=y
CONFIG_MPU_ALLOW_FLASH_WRITE=y

# Default partition for NVS is unused
CONFIG_PM_PARTITION_SIZE_NVS_STORAGE=0x0

CONFIG_CLOCK_CONTROL_NRF_K32SRC_RC=y
CONFIG_CLOCK_CONTROL_NRF_K32SRC_RC_CALIBRATION=y
CONFIG_CLOCK_CONTROL_NRF_K32SRC_500PPM=y

CONFIG_WIFI_FIXED_MAC_ADDRESS="22:22:22:44:44:44"

# CONFIG_NRFX_SPIM_LOG=y
# CONFIG_NRFX_QSPI_LOG=y
# CONFIG_SPI_LOG_LEVEL_DBG=y
# CONFIG_SPI_LOG_LEVEL_WRN=y

board/nrf7002dk_nrf5340_cpuapp_ns.overlay

// Update chosen node to use w25q32jv as external flash memory
/ {
	chosen {
		nordic,pm-ext-flash = &w25q32jv;
	};
};

// Disable mx25r64
&mx25r64 {
	status = "disabled";
};

// Enable and configure SPI with W25Q32JV flash memory
&spi4 {
    compatible = "nordic,nrf-spim";
    status = "okay";
    pinctrl-0 = <&spi4_default>;
    pinctrl-1 = <&spi4_sleep>;
    pinctrl-names = "default", "sleep";
    cs-gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
    w25q32jv: w25q32jv@0 {
        compatible = "jedec,spi-nor";
        reg = <0>;
        spi-max-frequency = <133000000>; // 133 MHz
        jedec-id = [ef 40 16]; // Manufacturer and device ID for W25Q32JV
        sfdp-bfp = [
        e5 20 f9 ff  ff ff ff 01  44 eb 08 6b  08 3b 42 bb
        fe ff ff ff  ff ff 00 00  ff ff 40 eb  0c 20 0f 52
        10 d8 00 00  36 02 a6 00  82 ea 14 c2  e9 63 76 33
        7a 75 7a 75  f7 a2 d5 5c  19 f7 4d ff  e9 30 f8 80
        ];
        size = <0x400000>;  // 4 MiB
        has-dpd;
        t-enter-dpd = <10000>;  // 10 µs (10000 ns)
        t-exit-dpd = <30000>;   // 30 µs (30000 ns)
    };
};

&spi4_default {
    group1 {
        psels = <NRF_PSEL(SPIM_SCK, 0, 8)>,   // P0.08
                <NRF_PSEL(SPIM_MISO, 0, 10)>, // P0.10
                <NRF_PSEL(SPIM_MOSI, 0, 9)>;  // P0.09
    };
};

&spi4_sleep {
    group1 {
        psels = <NRF_PSEL(SPIM_SCK, 0, 8)>,   // P0.08
                <NRF_PSEL(SPIM_MISO, 0, 10)>, // P0.10
                <NRF_PSEL(SPIM_MOSI, 0, 9)>;  // P0.09
        low-power-enable;
    };
};

child image/mcuboot/board/nrf7002dk_nrf5340_cpuapp.conf

# General
CONFIG_FLASH=y
CONFIG_MULTITHREADING=y
CONFIG_MAIN_STACK_SIZE=4096

# Serial Peripheral Interface (SPI)
CONFIG_SPI=y
CONFIG_SPI_NOR=y
# CONFIG_SPI_NOR_SFDP_DEVICETREE=y
CONFIG_SPI_NOR_FLASH_LAYOUT_PAGE_SIZE=4096

# MCUBoot and Partition Manager
CONFIG_PM_OVERRIDE_EXTERNAL_DRIVER_CHECK=y
CONFIG_PM_PARTITION_SIZE_MCUBOOT=0x10000
CONFIG_BOOT_MAX_IMG_SECTORS=2048
CONFIG_BOOT_ERASE_PROGRESSIVELY=y
CONFIG_SOC_FLASH_NRF_EMULATE_ONE_BYTE_WRITE_ACCESS=y

# Use minimal C library instead of the Picolib
CONFIG_MINIMAL_LIBC=y
CONFIG_LOG=y
CONFIG_LOG_MODE_MINIMAL=y
CONFIG_CLOCK_CONTROL_NRF_K32SRC_RC=y

child image/mcuboot/board/nrf7002dk_nrf5340_cpuapp.overlay

// Update chosen node to use w25q32jv as external flash memory
/ {
	chosen {
		nordic,pm-ext-flash = &w25q32jv;
	};
};

// Disable mx25r64
&mx25r64 {
	status = "disabled";
};

// Enable and configure SPI with W25Q32JV flash memory
&spi4 {
    compatible = "nordic,nrf-spim";
    status = "okay";
    pinctrl-0 = <&spi4_default>;
    pinctrl-1 = <&spi4_sleep>;
    pinctrl-names = "default", "sleep";
    cs-gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
    w25q32jv: w25q32jv@0 {
        compatible = "jedec,spi-nor";
        reg = <0>;
        spi-max-frequency = <133000000>; // 133 MHz
        jedec-id = [ef 40 16]; // Manufacturer and device ID for W25Q32JV
        sfdp-bfp = [
        e5 20 f9 ff  ff ff ff 01  44 eb 08 6b  08 3b 42 bb
        fe ff ff ff  ff ff 00 00  ff ff 40 eb  0c 20 0f 52
        10 d8 00 00  36 02 a6 00  82 ea 14 c2  e9 63 76 33
        7a 75 7a 75  f7 a2 d5 5c  19 f7 4d ff  e9 30 f8 80
        ];
        size = <0x400000>;  // 4 MiB
        has-dpd;
        t-enter-dpd = <10000>;  // 10 µs (10000 ns)
        t-exit-dpd = <30000>;   // 30 µs (30000 ns)
    };
};

&spi4_default {
    group1 {
        psels = <NRF_PSEL(SPIM_SCK, 0, 8)>,   // P0.08
                <NRF_PSEL(SPIM_MISO, 0, 10)>, // P0.10
                <NRF_PSEL(SPIM_MOSI, 0, 9)>;  // P0.09
    };
};

&spi4_sleep {
    group1 {
        psels = <NRF_PSEL(SPIM_SCK, 0, 8)>,   // P0.08
                <NRF_PSEL(SPIM_MISO, 0, 10)>, // P0.10
                <NRF_PSEL(SPIM_MOSI, 0, 9)>;  // P0.09
        low-power-enable;
    };
};

// ============================================================================

Error log we facing "W: Cannot upgrade: not a compatible amount of sectors"

*** Booting nRF Connect SDK v3.5.99-ncs1-1 ***
I: Starting bootloader
W: Cannot upgrade: not a compatible amount of sectors
I: Bootloader chainload address offset: 0x10000
I: Jumping to the first image slot

*** Booting nRF Connect SDK v3.5.99-ncs1-1 ***
Download client sample started
HTTP application update sample started
Using version 1
if up
Connecting to network
uart:~$

partition 

I need guidance to resolve  "W: Cannot upgrade: not a compatible amount of sectors" error? 

In addition to above issue, Initialy I have found that the child image/board/conf and overlay configuration is not reflected in output file - build/mcuboot. But after 2 to 3 build the config are reflected.

How can I include those file in build configuration to ensure that the config are included?

[Amanda Hsieh]

Hi, 

Lavanya_Manohar said:

board/nrf7002dk_nrf5340_cpuapp_ns.conf

Lavanya_Manohar said:

board/nrf7002dk_nrf5340_cpuapp_ns.overlay

Lavanya_Manohar said:

child image/mcuboot/board/nrf7002dk_nrf5340_cpuapp.conf

Lavanya_Manohar said:

child image/mcuboot/board/nrf7002dk_nrf5340_cpuapp.overlay

What is the board name you built for? Try to synchronize the name of the board config/overlay files.

Lavanya_Manohar said:

How can I include those file in build configuration to ensure that the config are included?

Try to synchronize the name of the board config/overlay files.

Lavanya_Manohar said:

I need guidance to resolve  "W: Cannot upgrade: not a compatible amount of sectors" error? 

Do you get a different log after synchronizing the name of the board config/overlay files?

-Amanda H.

[Lavanya_Manohar]

Amanda Hsieh said:

What is the board name you built for? Try to synchronize the name of the board config/overlay files.

Board configurations: nrf7002dk_nrf5340_cpuapp_ns

After change the child_imgae/mcuboot/boards/ conf and coverlay to nrf7002dk_nrf5340_cpuapp_ns and try to build with below configuration.

Facing compilation error : build_log_1

Can't able to paste build log here so I have provided in link.

And als try to build with below configurations

Facing compilation error : build_log_2

Amanda Hsieh said:

Try to synchronize the name of the board config/overlay files.

 But I have tried the same code without any changes for 8MB external flash. I didn't face any error like this.

[Amanda Hsieh]

Hi, 

From your build_log_1, I see the mcuboot uses nrf7002dk_nrf5340_cpuapp as the build target, so the board name for the mcuboot is nrf7002dk_nrf5340_cpuapp. That is the reason it cannot find the SPI in the log. Sorry for the mislead. 

It doesn't need to set the mcuboot board file as the second board configuration, the system would load it automatically according to the board name for the mcuboot.

You can check out this post regarding the overlay file and this sample. 

-Amanda H.