The relation for PIN reset and other reset


Sorry for long sentence.

The nRF5340 document describes about the Reset.
This chip set have the POR. so, if POR function work, I don't need to use the PIN reset.
because POR and PIN reset is similar function.

Is this correct ?

 

We use the Rest IC to assert the PIN reset.

In this case, POR and PIN reset is both useable,

What does it work for the chip set ?

 

When the voltage supplies the chip set, the POR work to the chip set.

After that, the RESET IC deassert .(the PIN reset changes from “L” to “H”.)

Is it no problem to use the above sequence ?

Our evaluation product doesn’t work GPIO at the chip set.

However, when we change PIN RESET pin from “L” to “H” by hand forced, the GPIO work.

( However, the communication core look like working, because the communication to the BLE device can do.)

 

And your document describes the PIN Rest following.

“Similar to a power-on reset, the application core is started after the reset pin is deasserted. The networkcore is held in reset, see Network force off on page 57.”
In my understanding of “Network core is held”,

If the Network core is held, the product cannot communicate to another device.
(However, my evaltation product can comunicate.)

We think that this problem occurred by the Rest function. So, we asked you about the reset function.



By the way,

Which type is the Rest signal detected by level or Eged ?

Best regars,
T.Shibuya

Related