Hello,
We have a Nor flash connected to the QSPI and another peripheral connected to the classic SPI.
Due to the errata [159], the HFCLK128M is running at 64MHz and so the SPI is running at 16MHz.
We want to increase the processing performance of our product by increasing SPI to 32MHz, and HFCLK128M to 128MHz.
Can we change the HFCLK128M speed to 64MHz before any access to the QSPI and restore it to 128MHz when it's finished?
Is this can have a negative impact (corrupted data) on SPI, I2C, or BLE if we change the core clock during a transaction?
Here is the code we use to change the HFCLK128M clock:
nrfx_clock_divider_set((nrf_clock_domain_t)NRF_CLOCK_DOMAIN_HFCLK, (nrf_clock_domain_t)NRF_CLOCK_HFCLK_DIV_2);
Thanks,