nrf5340 SPI 32MHz, HFCLK128M 128MHz and QSPI usage

[tcube]

Hello,

We have a Nor flash connected to the QSPI and another peripheral connected to the classic SPI.

Due to the errata [159], the HFCLK128M is running at 64MHz and so the SPI is running at 16MHz.

We want to increase the processing performance of our product by increasing SPI to 32MHz, and HFCLK128M to 128MHz.

Can we change the HFCLK128M speed to 64MHz before any access to the QSPI and restore it to 128MHz when it's finished?

Is this can have a negative impact (corrupted data) on SPI, I2C, or BLE if we change the core clock during a transaction?

Here is the code we use to change the HFCLK128M clock:

nrfx_clock_divider_set((nrf_clock_domain_t)NRF_CLOCK_DOMAIN_HFCLK, (nrf_clock_domain_t)NRF_CLOCK_HFCLK_DIV_2);

Thanks,

[Håkon Alseth]

Hi,

 

Can we change the HFCLK128M speed to 64MHz before any access to the QSPI and restore it to 128MHz when it's finished?

Yes, it is designed to be performed at any time (except for scenarios given in the errata you pointed to), as stated here:

https://docs.nordicsemi.com/bundle/ps_nrf5340/page/chapters/clock/doc/clock.html#ariaid-title3

Is this can have a negative impact (corrupted data) on SPI, I2C, or BLE if we change the core clock during a transaction?

This changes the scaling to the CPU, not the peripheral clocks.

The PCLK nets listed here will remain to whichever configuration they are set to use:

https://docs.nordicsemi.com/bundle/ps_nrf5340/page/chapters/clock/doc/clock.html#ariaid-title2

 

Kind regards,

Håkon

 

[tcube]

A last question for my understanding:
Configuring the SPI to 32MHz requires the HFCLK128M to be at 128MHz.
What happens if the nrf5340 SPI starts a transaction à 32Mhz and changes the HFCLK128M to 64MHz to start a QSPI transaction? Does the SPI clock remain at 32 Mhz?

[Håkon Alseth]

Hi,

 

Sorry, since you mention SPI at 16MHz, you are ofcourse referring to the high-speed SPI4. My apologies for my mix up.

SPIM4 can run on 32 MHz, but only if the HFCLK128M is used.

tcube said:

What happens if the nrf5340 SPI starts a transaction à 32Mhz and changes the HFCLK128M to 64MHz to start a QSPI transaction?

The clock will continue to run at configured frequency, but it is not a supported combination and there is not guaranteed to work. If running SPIM4 at 32 MHz, the CPU must be configured at 128 MHz.

If you are asynchronously (with respect to the SPIM4 handling) switching CPU frequency, then I would recommend that you lower SPIM4 to 16 MHz.

 

Kind regards,

Håkon