About GPIO pin problem.

[k.hema sundar]

Hello Developers,

I am working with the nRF52833 microcontroller using segger embedded studio with the latest SDK. My issue is that I can configure and use all GPIOs except P0.18. I'm unsure why this is happening.

In my case, I am using a basic LED blink code with a green LED, but when I try to toggle it using P0.18, it does not work. However, all other pins function correctly.

Can anyone help me to resolve this issue?

#include <stdio.h>
#include <nrf_gpio.h>


//LED1
#define G_LED1         NRF_GPIO_PIN_MAP(0,18)

#define LDO_TRANS_PIN2       NRF_GPIO_PIN_MAP(1, 1)


void configure_pins(void) 
{  
    nrf_gpio_cfg(G_LED1, NRF_GPIO_PIN_DIR_OUTPUT, NRF_GPIO_PIN_INPUT_CONNECT, NRF_GPIO_PIN_NOPULL, NRF_GPIO_PIN_S0S1, NRF_GPIO_PIN_NOSENSE); 
      
    nrf_gpio_cfg(LDO_TRANS_PIN1, NRF_GPIO_PIN_DIR_OUTPUT, NRF_GPIO_PIN_INPUT_DISCONNEC_GPIO_PIN_NOPULL, NRF_GPIO_PIN_S0S1, NRF_GPIO_PIN_NOSENSE);
   
    nrf_gpio_pin_set(LDO_TRANS_PIN1);
  
}

void delay_ms(uint32_t ms) 
{
    for (uint32_t i = 0; i < (ms * 850); i++); 
}

void delay_s(uint32_t s) 
{
    delay_ms(s * 2000);
}



int main(void) 
{
    configure_pins();   
    
    while (1) 
    {
     nrf_gpio_pin_toggle(G_LED1);
     printf("G_LED1 status: %d\n", nrf_gpio_pin_read(G_LED1));
     delay_s(1);
    }
}

[hmolesworth]

On the nRF52833 P0.18 is optionally available as an active-low reset pin. To restore io pin mode look for and remove the setting for using the pin as a reset and then do a FLASH erase to erase UICR. P0.18: Once a reset pin always a reset pin until a UICR erase.

4.5 UICR — User information configuration registers
Register Offset Description
PSELRESET[0] 0x200 Mapping of the nRESET function (see POWER chapter for details)
PSELRESET[1] 0x204 Mapping of the nRESET function (see POWER chapter for details)
Note: All PSELRESET registers have to contain the same value for a pin mapping to be valid. If values are not the same, there will be no nRESET function exposed on a GPIO. As a result, the device will always start independently of the levels present on any of the GPIOs.